Worst case DNL of switched capacitor

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Why INL is for a single capacitor? as shown in page 631

 

as with every binary scaled DAC, the worst case DNL happens at the major transition 01111... to 10000... Simply because you have to turn all LSBs off and turn the MSB on and the variances of the caps turning off and the cap turning on add to produce the total variance of the transition.
 
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