VirtuosoDracula
Junior Member level 1

Hi Experts,
I would like to understand that how does column decoding and multiplexing takes place concurrently in an SRAM.
For, eg I have a 64Kx8 SRAM, how will I get 8 bit output since by putting address to row and column decoder I will only be able to get a single bit selected.
Request you all to help me understand it.
Thanks in advance,
VD
I would like to understand that how does column decoding and multiplexing takes place concurrently in an SRAM.
For, eg I have a 64Kx8 SRAM, how will I get 8 bit output since by putting address to row and column decoder I will only be able to get a single bit selected.
Request you all to help me understand it.
Thanks in advance,
VD