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Working of column decoder in SRAM

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VirtuosoDracula

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Hi Experts,

I would like to understand that how does column decoding and multiplexing takes place concurrently in an SRAM.
For, eg I have a 64Kx8 SRAM, how will I get 8 bit output since by putting address to row and column decoder I will only be able to get a single bit selected.

Request you all to help me understand it.

Thanks in advance,
VD
 

betwixt

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It varies by device type but basically you are right but there are 8 circuits in parallel sharing the same address, one with each bit in it and they are each connected to one of the data pins.

Brian.
 

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