Will microcontroller be damaged by input from opamp?

[cupoftea]

Hi,
Will the micro be damaged by the (non series resistor protected) opamp input?
LTspice and jpeg attached.
The micro has a -3v3 rail, and a 20V rail.
Micro has rail +3v3 to 0V.
Its a TL084C opamp.
What would be the worst circumstance for the micro?
The opamp output current is clamped to some 26mA, as you know,
Maybe micro can stand a short blast at 26mA?

TL084C opamp

TL084 data sheet, product information and support | TI.com

TI’s TL084 is a Quad, 30-V, 3-MHz, 13-V/µs slew rate, In to V+, JFET-input op amp. Find parameters, ordering and quality information

www.ti.com

STM32F103V micro (100pin)

https://www.st.com/resource/en/datasheet/stm32f103c8.pdf

The opamp goes into pin 35 of the micro which is labelled as an Analog input. ("PB0/ ADC_IN8 /T3_C3")

 

[FvM]

Not good. Guess you noticed maximum ratings, maximal injected current +/- 5 mA. There should be an effective current limiting means.

 

[danadakk]

 

[KlausST]

Hi,

Micro specification is clear in this.

Some questions:
What does this mean:

The micro has a -3v3 rail, and a 20V rail.

Please confirm it's the Opamp, as shown in the schematic.

Why does a PWM signal (digital) go to a analog /ADC input of a micro?
What's the purpose of the signal?

Why the Opamp at all?

*******
Surely voltage limiting (short circuiting) an Opamp output is no good idea. 20V x 26mA gives more than half a Watt of heat.

Klaus

 

[cupoftea]

Thanks, sorry, its the micro that has Vcc of 0V to 3v3.
The ADC input is needed because we dont just need to know its high, but need to check its also "high enough".
There is a school of thought that the opamp is a buffer...and that since its non-inv pin is never <0V, then neither should be the output.....though is there something with offset voltages of certain batches?...that when inv and non-inv are both 0V......it could be that non-inv "looks like" it is less than 0V?...so opamp output goes to negative rail?

--- Updated Sep 6, 2023 ---

Why the Opamp at all?

Thanks, the low impedance output is good to carry the signal to micro some 7cm away...so noise doesnt corrupt it.......plus the ADC can get a quicker reading, (as ADC capacitor can be charged up quicker) as opposed to if we just sent the divider voltage.

 

[KlausST]

Hi,

I'd rather use a comparator to check on proper HIGH level.

7cm is not much ... but it surely depends on:
* the expected noise in the environment
* signal routing / shielding ftom noise / GND plane
* PWM frequency
* ADC sampling rate
* expected accuracy
* ....
We don't know about all this..

Klaus

 

[danadakk]

There is a school of thought that the opamp is a buffer...and that since its non-inv pin is never <0V, then neither should be the output.....though is there something with offset voltages of certain batches?...that when inv and non-inv are both 0V......it could be that non-inv "looks like" it is less than 0V?...so opamp output goes to negative rail?

A follower OpAmp's output , Vout = (Vin +/- Voffset) (ignoring G error due to finite Aol). So if
Vninvinput = 0 then Vout = + or - Voffset

Is the PWM source actually being used as a DAC, eg. its output filtered by a LPF to convert
PW to DC ?


Regards, Dana.

 

[std_match]

One warning about injecting current into analog input pins, even if within the maximum ratings.
In some other device (I can't remember which one), other analog inputs were affected when current was injected into one of the analog input pins. I don't know if this is a general problem.

 

[KlausST]

Hi,

One warning about injecting current into analog input pins, even if within the maximum ratings.
In some other device (I can't remember which one), other analog inputs were affected when current was injected into one of the analog input pins. I don't know if this is a general problem.

Yes, I had one of these problems with a multi input channel ADC (I think it was an LinearDevices one), where all the other channles were upset when one input was beyond specification.

Klaus

 

[cupoftea]

thanks..
...the attached sim is nearer what we are doing with the circuit........in the attached LTspice sim, after a few ms, the 20V rail goes down as the product is switched OFF......but the neg_3V3 rail stays about neg_3v3...its at this point where the big injection of current goes through the ADC pin 's ESD diodes....because the opamp output goes negative.

I think this is the danger point of the circuit...would you agree?

So injecting current wouldnt be a problem..since the product has just been switched off.

 

[dick_freebird]

The danger points are forward-biasing uC ESD diodes
to the point that you light up the parasitic BJTs that they
are an inescapable part, of. Only local shunt R is keeping
those BJTs / SCRs quiet. The pin mA numbers are a
loose, likely / hopefully sandbagged limit to keep you
out of that.

Now if this fault condition is only during power-down
and the uC supply will collapse shortly, maybe latchup
doesn't do anything (besides hasten that sag). But if
uC can stay lit while op amp is messing, then for sure
limit the pin current (or put it through some other buffer
which cannot impose a threat of any significance, can
take some higher abuse and is co-powered with the uC).