Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Total current required by OPAMP

Bjtpower

Full Member level 5
Joined
Dec 24, 2015
Messages
297
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
3,893
Hi,

I am trying to do paper calculation for current requirement for OPAMP AD8022

I would like to make sure how much current required by OPAMP when it is in operation mode.
I have captured below snapshot from PAGE No: 3

I have supply voltage: +-5V
So 55 mA is the correct current which will draw from my power supply? or 55mA+11mA=66mA (Quicent current of both opamp) or something else?
1702461639446.png


I
 
I have supply voltage: +-5V
So 55 mA is the correct current which will draw from my power supply? or 55mA+11mA=66mA (Quicent current of both opamp) or something else?
There's quiescent current and load current. The latter is determined by the load.
I believe the datasheet is pretty clear. Maximum linear output current is like quiescent current specified per amplifier. So your power supply has to provide about 120 mA if you want to use maximal linear output. Most likely you won't. Start with analysis of your application circuit.
 
There's quiescent current and load current. The latter is determined by the load.
I believe the datasheet is pretty clear. Maximum linear output current is like quiescent current specified per amplifier. So your power supply has to provide about 120 mA if you want to use maximal linear output. Most likely you won't. Start with analysis of your application circuit.
Hi, I am using AD 8022 as difference amplifier (First stage) and Level shifter (Second Stage) as below.
1702464808212.png


Can you please help what do you mean by "if you want to use max linear output"? Do you mean entire range of Supply voltage
 
Quiescent current is what the Op-amp itself consumes, the load current is what you draw from it's output pin. It doesn't mean 55mA is being drawn all the time, it means IF you draw more then 55mA the output will no longer be linear. The actual maximum current allowed is described in Table 3 of the data sheet.

In your application, A2-A load current will never be more than about 2mA (ignoring feedback current and assuming A2-B output is at the opposite rail to A2-A output). How much current flows from A2-B depends on the AD7484 circuitry, if it is just the ADC it will be very small.

Brian.
 
Hi,

what is your common mode input voltage range at AIN+, AIN-?

Mind:
* that AIN+ has not the same input impedance as AIN-.
* that the ADC decodable input voltage range is 0V...+2.5V only
* that your second OPAMP output is -Vin + VRef (not 0.5 x VRef), so it outputs 2.5V when differential input voltage is 0V.
* that you need to protect the ADC input against negative voltage

I recommend you to use simulation software.

Klaus
 
Quiescent current is what the Op-amp itself consumes, the load current is what you draw from it's output pin. It doesn't mean 55mA is being drawn all the time, it means IF you draw more then 55mA the output will no longer be linear. The actual maximum current allowed is described in Table 3 of the data sheet.

In your application, A2-A load current will never be more than about 2mA (ignoring feedback current and assuming A2-B output is at the opposite rail to A2-A output). How much current flows from A2-B depends on the AD7484 circuitry, if it is just the ADC it will be very small.

Brian.
I wonder, how did you get 2mA?
 
Hi,

Generally it´s nothing more than Ohm´s law. I = V / R.
You can solve it on your own with paper and pencil, a calculator, excel, simulation....

We see the Rs.. but we don´t know the Vs. Thus I asked about them in post#5.
Without the V we can just guess.

We could do worst case scenarios.

But indeed it´s not exactly clear what "value" you need to know. What are you after? What do you need this value for?
* The absolute peak value for pos supply, for neg supply
* the max average value for undistorted sine signals
* or even for distorted signals, DC, square wave?

Klaus
 
Bias current drops significantly with Vcc from the typical plots but maximum linear swing and load impedance will determine your ideal needs, but if saturated may exceed this.

1st define your minimum load impedance then compute. Your linear swing is load dependent and only approx +/- 3.8V from +/-5 V rails. So optimizing your load R makes all the difference for current peaks, from 7.6 mA to max of 32 mA at 100 Ohms!

1702484110918.png


The effects on output always depends on source/(load+source) impedance ratio for load regulation error with adequate feedback gain to reduce error.
1702485412029.png

There is also a current swing-BW constant for figure 7 into 500 ohms. that does not show up for small signals into 1000 Ohms. in figure 4 that reduce supply current applications using AC coupled 500 Ohms from 5V to 10 mApk
1702484642091.png



So it depends on your goals. which were not clear and you ought to clarify;
How to minimize current from supply, or
how to maximize current to load, or
how to estimate all the supply current spec. variables?

Also recognize that plots are "typical" and tables are worst case.
 
Last edited:
AIN+ to AIN- has max voltage of 5V, F=1KHZ, V+=+5V, V-=-5V
The ~ max ouput is +/- 1.3 V for +/- 2.5 V supply so for +/- 5V you add 2.5V and can get ~ +/- 3.8

if you intend to compute current , understand my answer.
 
Last edited:
If you are actually going to use this part this will be one of the significant
challenges :

1702490664699.png


Note this datasheet did not show an actual layout. You can lo ok at some of the
other recent high speed OpAmp datasheets, they typically show actual layouts,
or look at layouts on the eval board.

OpAmps like this love oscillating due to parasitics. Also recommended is eval the
actual HF caps you plan to use, to make sure they do not exhibit too much ESR
due to construction inductance. Personal experience is caps of same technology,
same or similar construction/package, but different vendors, can be wildly different
in RF performance. There is a lot of art involved in RF work.......and lots of ap notes
on vendor websites and amatuer radio publications.



Regards, Dana.
 
Last edited:
AIN+ to AIN- has max voltage of 5V, F=1KHZ, V+=+5V, V-=-5V
This is just a quarter of what is needed. (one of four)
(AIN+ to AIN-) means differential voltage. Now we know the max is 5V.So please tell what is the min value. Is it 0V? is it -5V? or anything else?

(AIN+ to AIN-) means differential voltage. But we also need to know the common_mode_voltage. It also has a min value and a max value.

****
Again: (post#8) What do you use these values for?
Lets say some one says: 60mApk at +5V and 75mApk at -5V. What do you do with these values?

Klaus
 
Especially x pF parasitic coupling from output voltage or loop current coupling to Vin+ will cause oscillation or ringing.

If you want Rail to Rail output, you need FET Op amp but due to crossover shoot thru tolerances have higher output impedance than BJT's. But Zo is reduced by excess gain feedback for small signal currents., but not max current.

so again.. what is your load Z(f)?
 
I suppose there's nothing wrong as we consider basic examples where the op amp sources current to the load (simultaneously drawing current from a positive supply).

Some replies here touch on instances which involve negative supply polarity (output sinks current). Questions arise (if we wish to ponder op amp principles):

* We understand current enters the op amp through its positive lead whenever the output pin is called on to source current. Does current ever flow in the op amp's negative power lead? When?
(yes, when the output is called on to sink current.)

* Does current ever flow in both power leads?
(no, because that event implies shoot-through inside the op amp, wasteful and counterproductive.)

And then there's the instance of 0V output to a load, in various situations. Thus we uncover questions about the direction of current flow and level of current in the output stage. For another discussion.
 

Attachments

  • AD8022 Simulations.zip
    1.6 KB · Views: 50
Hi,

a remark on the simulation. First: well done!

you see that I_CC (= current on VCC) carries AC while I_EE does not.
If you shift V_IN (common mode as well as differential mode) you may see the opposite (I_EE carries the AC) or both carry AC.

Klaus
 

LaTeX Commands Quick-Menu:

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top