Jul 12, 2005 #1 A au_sun Full Member level 2 Joined Aug 5, 2004 Messages 147 Helped 15 Reputation 30 Reaction score 4 Trophy points 1,298 Activity points 1,184 When seen in an LEF file for a technology, we get width and PITCH infos for metal wires, how is this PITCH siginificant to EDA tool that use it, what for they mention in the technology file, help me in this regard au_sun
When seen in an LEF file for a technology, we get width and PITCH infos for metal wires, how is this PITCH siginificant to EDA tool that use it, what for they mention in the technology file, help me in this regard au_sun
Jul 18, 2005 #2 K kelvin_sg Advanced Member level 4 Joined Aug 17, 2004 Messages 102 Helped 3 Reputation 6 Reaction score 3 Trophy points 1,298 Location Singapore Activity points 852 These information won't affect ASIC designers. Engineers in charge of layout and P&R will take care of that.
These information won't affect ASIC designers. Engineers in charge of layout and P&R will take care of that.
Jul 19, 2005 #3 J justin999 Guest ptich is the allowed minmum distance between two metals of the same layer, but it is not the same with metal spacing
ptich is the allowed minmum distance between two metals of the same layer, but it is not the same with metal spacing
Jul 19, 2005 #4 P papertiger Member level 2 Joined Dec 28, 2002 Messages 52 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 319 this affect a lot in P&R. It gives you the basic idea of routing resource. If you have redundent routing resource, you can wide the pitch to get better timing and yield.
this affect a lot in P&R. It gives you the basic idea of routing resource. If you have redundent routing resource, you can wide the pitch to get better timing and yield.