Why we need current source in output stage of a buffer?

[mike_bihan]

Output stage of buffer

The buffer of d2a circuit need to provide swing capability. The buffer was actually a 2 stage OP-Amp, with unity gain feedback.

The first stage was very typical differential N-pair with Pmos current mirror load. The 2nd stage was a little wierd.

It is consists of one push-pull stage with a current source. The circuit structure was attached in the jpg file.
**broken link removed**

My question was that why we need that current source?
I was thinking about reason we need one more current source, other than push-pull stage only.

My idea was that the current source will be helpful when the output stage was discharging the output node, make the node begin to discharge before the p-device turn on. However, it also burns current during the hd2a was on.
Can you give me some information?
Thanks!

 

[andy2000a]

Re: Output stage of buffer

Hi
this circuit look like strange .. output use "invert" stage ..
I think it will have large THD when input is small input ..
what not use class_AB stage ?

and I only know some output stage use common_source + current load
--> Razavi have a good book
"design of Analog CMOS integrated circuit "

 

[hardings]

Carefully that is not 'invert' stage, it's BUFFER.
It is strange.
Look like predischarge when vout goes low and bias
when vout goes high?

 

[Hughes]

Re: Output stage of buffer

The circuit can be better understood if we redraw the output buffer as in the attached fig. The NMOS M6 and the current sink M7 form a basic source follower, functions as basic output buffer. It has the drawback of limited current sinking ability. When a large negative step is applied at node n3, the output node Vout drops, but the speed is limited by the current sink.

If a PMOS M5 is inserted as shown in the figure, the discharge speed of Vout is accelerated before Vout reaches V(n3)+|Vth(M5)|. After that, Vout continues discharge until it reaches V(n3)-Vgs(M6). At this point, M5 is in off-state.

 

[mike_bihan]

thanks for your inputs. But why not remove the current source entirely?

 

[Hughes]

Re: Output stage of buffer

If the current source is removed, the Vout node and be stay any where between V(n3)-Vthn and V(n3)+|Vthp| when the output is open circuit. This is not we want.

 

[mike_bihan]

oh, yeah. So, ie, push-pull stage must be combined with certain discharge path?

 

[Hughes]

oh, yeah. So, ie, push-pull stage must be combined with certain discharge path?

We can add a level-shifter (I don't know this is the exact name) at n3. Just break the connection of n3 to PMOS gate. Add some circuit, two series diodes for example between n3 and the PMOS gate. The diodes themselves must have DC path to the ground.

 

[amitbhaiji]

Re: Output stage of buffer

what i feel is inserting the level shifter will be better approach for the same.
AMit