why metal contacts are made over polysilicon extension not poly gate in IC layouts

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vkp

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Hi all,

Please help me in undestanding the following point about layouts:

1) As the poly extension is required over active to avoid mask misalignment error. Is there any other constraint over this extension. I have read some where that polt extension depends on Diffusion / implant mask misalignment and poly misalignment. Could any one alaborate this point.

2) The metal contacts are made at poly extention not over poly gate. Why this is done ?


Thanks
 


for 2> Contacts need enclosure, and enclosure sometimes conflicts with the poly notch rules and the OD distance .So to avoid DRC this is done.
 
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    vkp

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In modern processes Lmin << min contact cut + oversize. But
there is also the concern about contact processing perturbing
the local gate / oxide through stress/strain and this is not
often qualified, perhaps not qualifiable.
 
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    vkp

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In some technologies, contact over gate poly is allowed (for example, in some variants of image sensor technologies).
This can save space.
 
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    vkp

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The stress over oxide point is understandable. I think the direct contact over poly also increase the risk of oxide breakdown due to antenna effect. As etching is being done directly over gate poly. Please let me know if i am right.

Thanks
 

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