Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Why MCU Companies Switched To 3.3V?

Status
Not open for further replies.

rhnrgn

Member level 5
Member level 5
Joined
Dec 25, 2013
Messages
92
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Visit site
Activity points
2,069
Hello,

What is the reason and benefit of using 3v3 at digital circuits.

I am using 5V at digital level.

Nowadays i am on a new design and not sure should i use 3v3 or go on with 5v. I saw many new MCU are using 3v3.

Thank You
 

Two reasons I can think of..

1) V x I = power dissipated. So with a lower V, there is less power loss. At very high densities this is important.

2) With a lower switching threshold, the circuits can work that much faster.
 
  • Like
Reactions: rhnrgn

    rhnrgn

    Points: 2
    Helpful Answer Positive Rating
To increase speed, the semiconductor processes use smaller feature sizes and gate oxide thicknesses. These have lower breakdown voltages so the circuits must operate at lower supply voltages. This has the added benefit of using less power for a given operating frequency.

Some of the internal circuits of a modern µP work at at a much lower voltage then 3.3V, down to a volt or less. For example a recent Intel processor data sheet listed operation at between 1V and 1.275V with a processor supply current of 57A :!: at its maximum operating frequency.
 
V x I = power dissipated. So with a lower V, there is less power loss. At very high densities this is important.

Dynamic losses, which make most of processor power consumption have even a quadratic voltage dependency. They are reduced by more than 50 % when changing to 3.3V.
 
  • Like
Reactions: rhnrgn

    rhnrgn

    Points: 2
    Helpful Answer Positive Rating
Excuse, I am confused about your reason 1):The power of a device needed is constant ,so accroding to P=V*I, if the Voltage is low,the Current must be high,and the Power loss on the transmission line is also high(P=I*I*R), So I think with a lower V,there is more power loss. am I right?

- - - Updated - - -

Dynamic losses, which make most of processor power consumption have even a quadratic voltage dependency. They are reduced by more than 50 % when changing to 3.3V.
would you mind explain why most of processor power comsumption have even a
quadratic voltage dependency?
 
  • Like
Reactions: rhnrgn

    rhnrgn

    Points: 2
    Helpful Answer Positive Rating
Excuse, I am confused about your reason 1):The power of a device needed is constant ,so accroding to P=V*I, if the Voltage is low,the Current must be high,and the Power loss on the transmission line is also high(P=I*I*R), So I think with a lower V,there is more power loss. am I right?
......................................
would you mind explain why most of processor power comsumption have even a
quadratic voltage dependency?
The power of a device does not need to be constant. It only takes the power it needs to operate. Transmission line effects aren't significant at the IC switching speeds in the small dimensions of an IC circuit.

Most of the IC circuit power is not due to circuit resistance but to charging and discharging the stray capacitances in the circuit as the digital signals go high and low. The power stored on a capacitor is 1/2 CV2. The charging process is only 50% efficient through the resistance of the transistor, so energy equal to 1/2 CV2 is dissipated when charging the capacitor, and the capacitor energy is then dissipated when the capacitor is discharged. The total energy dissipated to charge/discharge the capacitor is thus CV2. Since this occurs once per cycle, the total power is P = fCV2 where f is the switching frequency at the node, thus giving the quadratic dependency of IC power with voltage.
 
sorry for my inexplicit explanation,I mean in the same load condition.when the power is the constant,the lower the voltage is,the higher the current is.so I think the assumption "the lower the supply voltage is, the smaller the power losses is".due to P=I*I*R, whether my understanding is right?

- - - Updated - - -

The power of a device does not need to be constant. It only takes the power it needs to operate. Transmission line effects aren't significant at the IC switching speeds in the small dimensions of an IC circuit.

Most of the IC circuit power is not due to circuit resistance but to charging and discharging the stray capacitances in the circuit as the digital signals go high and low. The power stored on a capacitor is 1/2 CV2. The charging process is only 50% efficient through the resistance of the transistor, so energy equal to 1/2 CV2 is dissipated when charging the capacitor, and the capacitor energy is then dissipated when the capacitor is discharged. The total energy dissipated to charge/discharge the capacitor is thus CV2. Since this occurs once per cycle, the total power is P = fCV2 where f is the switching frequency at the node, thus giving the quadratic dependency of IC power with voltage.

The explanation in your post make me understood the whole process.
thank you so much for your particular explanation.
 
Last edited:

The driving factor for microcontroller manufacturer is to reduce cost, increase functionality and increasing speed by going to new technology nodes(smaller transistor channel width). As you get smaller the voltage has to decrease to reduce power consumption, currents and avoid larger then needed breakdown voltages(cost transistor size). Since most MFGs are doing it the others have to follow to compete. One exception is some times that the market does not need the performance and there is no cost pressure.

Enjoy your design work!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top