In fact the hold time of a flip-flop will be positive, but if the library designer put a delay cell before the D pin, then see from the D_external pin, the hold time will be negative, but iif you see from the D pin, the hold time will also be positive.
For example: if a flip-flop's hold time requirement is 0.5ns, then if you add delay cell of 1ns before the flip-flop D input, then see from the input of the delay cell, the flip-flop's hold time will be -0.5ns, bu if you see from the D pin of the flip-flop, the hold time is also 0.5ns.