the layout is generated by Encounter and Drc free. When I do LVS, calibre told me that there are some ports in the layout are missing from source netlist. I found that calibre regarded some "wire" nets of source netlist as ports and the top module of the netlist(generated from layout) has more input/output ports than the source netlist. Can sb. help me?
the layout is generated by Encounter and Drc free. When I do LVS, calibre told me that there are some ports in the layout are missing from source netlist. I found that calibre regarded some "wire" nets of source netlist as ports and the top module of the netlist(generated from layout) has more input/output ports than the source netlist. Can sb. help me?
pranam.bhagavan
Would you explain it in detail?
I don't thnik it is due to the power and ground signal because both of the layout and source have VDD and VSS.
I have never experienced problems like this before...
As far I know,
1. If Layout has more no.of nets/ports than Sch, then there is something open in the layout.
2. If Layout has less no.of nets/ports than Sch, then there is something open in the layout.
There may be some layers/labels which purpose is in Pin layer. In this case, the Calibre recognizes the pin layer/label as port..
it is possible something might have been renamed by mistake in your layout or if it was disconnected...usually in layout this happens when you open in edit mode ....just some manual mistakes.
The LVS is accurate ...if its reporting some mismatch then ...there is definetly something not right.