vipul982
Junior Member level 3
Hi guys,
I wnated to know why write and read levelling technique is completely different in DDR3? are both of them done to synchronize between clock and DQS signal? I am not clear as to why both technique is different even though same result is targeted...
I wnated to know why write and read levelling technique is completely different in DDR3? are both of them done to synchronize between clock and DQS signal? I am not clear as to why both technique is different even though same result is targeted...