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Why is the Standby Current so high? (Altera Cyclone FPGA)

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mountain

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My boss give me a problem that why the Standby Current Icc0 of Altera Cyclone EP1C20F400C6 is so high?

The <Altera Cyclone PowerPlay Early Power Estimator Version 2.0> reported that the Typical Standby Current Icc0 of EP1C20F400C6 is up 12mA. My boss think it too high, but don't know why. Maybe it is because of the leak current.

Can you tell me why the Standby Current Icc0 is so high?
It is better to instruct me the reason (circuit lever).

Thank you for your help!

<Altera Cyclone PowerPlay Early Power Estimator Version 2.0>
https://www.altera.co.jp/support/devices/estimator/cyc-estimator/cyc-power_estimator_download.html :not:
 

Re: Why is the Standby Current so high? (Altera Cyclone FPGA

To the best of my knowledge, FPGA 's are based on SRAM configuration cells. ANd they leak a bit.
 

Re: Why is the Standby Current so high? (@ltera Cyclone FPGA

Ice-Tea said:
To the best of my knowledge, FPGA 's are based on SRAM configuration cells. ANd they leak a bit.

Thank you!
But they are based on SRAM, not DRAM. Why is the Standby Current so high? The SRAM in the FPGA needs refreshing?
 

Re: Why is the Standby Current so high? (Altera Cyclone FPGA

Why don't you ask Altera or your distributor?
They are the first source of knowledge
 

Re: Why is the Standby Current so high? (Altera Cyclone FPGA

Thank you!
It make me know much. Thank you!
 

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