Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Why is the output of a decimation in FFT bit reversed?

Status
Not open for further replies.

kingmakerbull

Junior Member level 1
Joined
Apr 19, 2007
Messages
15
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Activity points
1,412
NEED HELP URGENT!

Why is the output of a decimation in FFT bit reversed. I have searched many books that explain how the bit reversal pattern occurs but none of the book gives why it occurs. pls reply
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top