Why interrupts are Active low???

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kpk

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Kindly post any documents regarding resets.
 

if you see the reset circuit you can solve it by yourself.

The reset is implemented by PMOS so in order to make it effective it should be low.

or in traditional RC based circuits it can be low or high depend on the place of the reset switch
 

kpk said:
Kindly post any documents regarding resets.

Hi KPK,

Attaching a pdf related to reset usages in SoC design. Hope it helps...
 

active low reset is used to reduce the power consumption
 

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