Recently, integrated circuit (IC) designers have started taking advantage of high-density, high-speed CMOS technology to develop digital signal processing (DSP) intensive clock source solutions that are both high performance and frequency agile. These DSP-based architectures use a low frequency resonator element (typically a quartz crystal) and a high-frequency on-chip VCO to produce a frequency agile high-speed, low-jitter output clock whose output rate is digitally-controlled and whose jitter performance equals that of traditional high-performance VCSOs. The resolution of the digital frequency control can be very fine, much less than one ppm, with a continuous tuning range of more than one GHz. Compared to the high frequency (>100 MHz), high absolute accuracy (<±20 ppm) and pulled (±20-100 ppm) resonators required in traditional high-performance VCSOs, these resonators can be very small and inexpensive because the reference resonator is low frequency (<40 MHz), has loose absolute frequency accuracy requirements (<±10,000 ppm) and is not pulled with changes in DCO output frequency. These resonators can be very small and inexpensive.