HelloThe most critical signals like reset signals for flip flops and the control signal of various communication interfaces (CS/SS for the SPI) are often active low. What advantages do they bring over having an active high signal ?
If a signal is pulled low it will always remain low and be seen as a low before, during and after powerup.
Whereas power sequencing issues can make it hard to guarantee the same for a high.
I was told (about 30 years ago) that it is harder for noise to make a low look high compared to noise making a high look low, so critical signals were made low. I think it goes back to the difference between input high current and input low current.
Input voltage ranges
Vih = 2V
Vil = 0.8V
output voltage ranges
Voh = 2.7V
Vol = 0.5V
Hi,
I´m really interested in the answer.
But for many circuits it really may cause problems when a signal is considered LOW at statup.
I think about
* the *RD and *WR signals coming out of a processor. I don´t think it´s a good idea to have both *RD and *WR active at power up.
* or the *CS signals of SPI slaves. When they are LOW, then they enable the driver for MISO ... causing short circuit currents...
* or similar the *OE signal of parallel SRAM, EEPROM, FLASH .. chips
Klaus
This is how I do, too.and added an additional active high enable.
I agree.I also wonder whether the question is actually correct: Are more 'critical' signals actually active low? Seems hard to define or quantify.
the control signal of various communication interfaces (...) are often active low
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