High Vth in power FETs means a high gate voltage swing
means high switching losses.
In IC technology, you have to position VT to best deal
with the leakage power vs drive strength / speed "box".
Here you often see multiple VTs in the same flow so
that you can optimize near-static logic, and high speed
clocked circuitry separately.
An "easily included" bias supply can be even more easily
nixed by some cost-fixated person leaving you with the
choices of flaky operation or high switching losses, only.
Cost being their problem, performance being yours....