Why are low vds FETs so commonly having such low Vgs(th)?

[treez]

Hello,
The following article states , on pages 15 to 16, how the sync FET of a buck converter can be spuriously turned on when the top FET turns on..
“MOSFET Selection to Minimize Losses in Low-Output-Voltage DC-DC Converters”.
https://www.fairchildsemi.com/techn...es-in-Low-Output-Voltage-DC-DC-Converters.pdf

Surely a good way to mitigate this is to use MOSFETs with higher Vgs(th). After all, if the Vgs threshold voltage is higher, then the spurious upsurge in VGS has further to go before it can turn the FET on. So why does the document not mention that using FETs with higher Vgs(th) is a good way of mitigating this problem? Also, with 60V Vds rated FETs and below, why are they mostly having such low vgs(TH) of 1.2-2V? For example, the Infineon NFETs in flat QFN style packages almost all have logic level Vgs(th) of 1.2-2V. –Such a low Vgs(th) doesn’t help in reducing the spurious FET turn_on mentioned. –Especially at high temperature where the Vgs(th) gets even lower still.

 

[betwixt]

I suspect it is so they can be used in applications like PC motherboard regulators where the supply is typcally 3.3V and they are used in regulators with outputs as low as 1.5V. There simply isn't enough voltage available to fully switch them if Vgs is too high.

Brian.

 

[treez]

thanks, i take your point, but a separate boosted bias supply can easily be included to provide the higher gate vgs drive for standard gate drive fets. -Its not a problem, as you know.

 

[Warpspeed]

Spurious turn on is mainly an issue when switching higher voltages.
But as mentioned above, not all buck regulators always need to work at higher voltages.

So you get to select the most appropriate mosfet for the job, if its a very low voltage application, spurious turn on is less of a problem and you would use logic level mosfets.

 

[dick_freebird]

High Vth in power FETs means a high gate voltage swing
means high switching losses.

In IC technology, you have to position VT to best deal
with the leakage power vs drive strength / speed "box".
Here you often see multiple VTs in the same flow so
that you can optimize near-static logic, and high speed
clocked circuitry separately.

An "easily included" bias supply can be even more easily
nixed by some cost-fixated person leaving you with the
choices of flaky operation or high switching losses, only.
Cost being their problem, performance being yours....