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Which VHDL/Verilog Editor is the best ?

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ddboy40

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vhdl editor

Which VHDL/Verilog Editor is the best ?
Features for categorizing:
Syntax Highlighting,Autoindentation,folding...
 

verilog editor

i hope modelsim may be the best editor. if u ask me about only editor then Vim may be good. and modelsim is best for simulation.
 

best vhdl editor

HDL Designer from Mentor Graphic IS the best ever i have used...
 

verilog editor windows

Sorry folks I forgot to mention that I am looking for a FREE editor ie no Modelsim Designer or so cuz I can't afford for it. I've got Jedit that I usually code but java stuff, but I really need something better and free with syntax highlighting, indentation,window spliting, code segment folding, etc.
I don't really know how to configure my vim or xemacss for HDL otherwise it may be an alternative as mentioned above.
Please help!!
 

free verilog editor

XEMACs Is NO. 1 !!!!!
 

vhdl editors

yasser_shoukry said:
Xilinx ISE is very good, free and is well supported by Xilinx web sites

do v need to integrate with compiler?/?
 

verilog editor for windows

I think that the best for simulation is the modelsim and you can work with the on matlab with by the link for modelsim, but if you want to implement on xilinx fpga it will be better for you to use ISE.
 

vhdl code editor

professionally, when it comes to industry, most of the companies use either Emacs or VI .. I have previousely used VI and it is fantastic in editing text .. it gives you almost everything to do whatever you want with text .. the first thing I learnt was to copy a column in the middle of the text file and that made me interested in continuing with VI .. and when I say VI , I do mean VIM .. or gVIM of course ..

Later on .. I had to switch to Emacs .. maybe Emacs is not as good as VI in editing Texts .. yet, it does everything .. but maybe with more word to do .. the most important thing in Emacs, which I didn't see in VI is that it has Verilog-Mode .. this mode is unbelievable .. it shortens your development time to minimum .. one thing deserves to be mentioned is that you can change in one file and the changes are automatically echoed to other files .. like if you are modifying a sub-module .. the higher-level module can automatically sense the changes .. you can also instantiate sub-modules automatically .. declare inputs/outputs automatically .. do wiring automatically .. etc.

So, if you want to edit texts easily (search, grep, replace, copy, etc) .. go for VI .. but if you want to develope code fast, go for Emacs
 
verilog code editor

i think here is not a best,but a more suit .
i like vi
 

best verilog editor

Is there anyone have URL to download Free-HDL for windows?? I'd ever use Aldec Active-HDL and Multisim and I think each have different features..
 

best editor for vhdl

Nedit is best editor.
Modelsim or Ncsim are good for simulation.
If u cant afford to buy a tool go for ALDEC-Active HDL for simulation.
 

textpad verilog

hi pals,

According to me Modelsim is Good one for simulations.
 

verilog edit

Turbowriter is not bad. It can link with your EDA software.
 

vhdl editor good

use FPGADV which contains a complete front end tools
 

editor verilog windows

Hi...

You could try Notepad++. Its free and has syntax highlighting.
 

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