[PIC] Which Serial SPI Bit bang routine should be used?

[asking]

Hello,

I want to communicate with SPI device say for example NRF24L01+ . But i am confused some devices only need to send just data directly to the device while some of them need to point to register address along with data. So which Serial SPI Bit bang routine should be used in order to send the both the address and data at the same time ?

i am currently having

Thanks.

 

[FvM]

Re: Bit Banging SPI to Communicate with SPI Devices

Similar to the shown MAX7456 communication, but not exactly identical regarding number of data bytes. You'll want to refer to the description in the NRF24L01 datasheet.

 

[asking]

Re: Bit Banging SPI to Communicate with SPI Devices

Hi

i have great confusion regarding the SPI Software Routine for Write & READ.. I have SPI software routine for Write. What would be the SPI Routine for READ ? Please provide me c code software spi for read. Also tell me whats difference between Write & READ in SPI. as whatever we write in SPI it is returning some value. So why SPI Read function is required ? i have read many things about SPI But am confused. so please throw some light.

void SPI_Write_Byte(unsigned short num){
 unsigned short t, Mask, Flag;
 CLK_Pin = 0;
 Mask = 128;
 for (t=0; t<8; t++){
  Flag = num & Mask;
  if(Flag == 0) MOSI_Pin = 0;
  else MOSI_Pin = 1;
  CLK_Pin = 1;
  CLK_Pin = 0;
  Mask = Mask >> 1;
 }
}

 

[FvM]

Re: Bit Banging SPI to Communicate with SPI Devices

as whatever we write in SPI it is returning some value. So why SPI Read function is required ? i have read many things about SPI But am confused. so please throw some light.

A spi_read() function will receive the returned (MISO) data in a shift register and return it to the caller. You'll know if you read the MAX7456 example thoroughly.

Besides this general point, you should study the interface description of the used SPI slave. There are no general rules how SPI read access is activated and if read data are returned simultaneously with write data are separately. I'm rather sure that you'll find SPI code examples dedicated to NRF24L01.

 

[asking]

Re: Bit Banging SPI to Communicate with SPI Devices

FvM,

you're right i got some of the SPI for NRF24L01+ but none of them are proven working tested. So what i have solution is instead of writing SPI for both sides it would be trouble to troubleshoot transmitter and receiver. I have Arduino Nano with ready code transmitting some value to another arduino. I will use arduino as Tx and will program the Soft SPI for PIC16F628A and will troubleshoot accordingly until it receives signal from arduino stuff.

till then if you have any good link for SPI Bitbang for NRF24L01+ please let me know.

thanks

 

[asking]

Nrf24l01+ pic 16 c code not working

Hello Everyone,

I have just finished porting the code from Mirf Library to PIC16 (MPLAB IDE). I have checked SPI communication in the proteus and its looks ok i can see it is setting value of tx and rx address and return in the SPI monitor. So i think SPI is ok. Just don't know why its still not working ? is my code is having some issue please if anyone can look into the matter and point me the mistakes i make usually .

I am also confused between pipes. I have read the datasheet but still its not clearing to me practically. I just want to switch on / off Remote Relays so what should be the pipe address in tx and what should the pipe address in rx part ? with auto ack enabled ?

Thanks...

My TX Code:-

#include <xc.h>
#include <htc.h>
__CONFIG(FOSC_INTOSCIO & WDTE_OFF & PWRTE_OFF & MCLRE_OFF & BOREN_OFF & LVP_OFF & CPD_OFF & CP_OFF);
#define	_XTAL_FREQ	4000000
#include "stdint.h"
/* Memory Map */
#define CONFIG      0x00
#define EN_AA       0x01
#define EN_RXADDR   0x02
#define SETUP_AW    0x03
#define SETUP_RETR  0x04
#define RF_CH       0x05
#define RF_SETUP    0x06
#define STATUS      0x07
#define OBSERVE_TX  0x08
#define CD          0x09
#define RX_ADDR_P0  0x0A
#define RX_ADDR_P1  0x0B
#define RX_ADDR_P2  0x0C
#define RX_ADDR_P3  0x0D
#define RX_ADDR_P4  0x0E
#define RX_ADDR_P5  0x0F
#define TX_ADDR     0x10
#define RX_PW_P0    0x11
#define RX_PW_P1    0x12
#define RX_PW_P2    0x13
#define RX_PW_P3    0x14
#define RX_PW_P4    0x15
#define RX_PW_P5    0x16
#define FIFO_STATUS 0x17
#define DYNPD       0x1C
/* Bit Mnemonics */
/* configuratio nregister */
#define MASK_RX_DR  6
#define MASK_TX_DS  5
#define MASK_MAX_RT 4
#define EN_CRC      3
#define CRCO        2
#define PWR_UP      1
#define PRIM_RX     0
/* enable auto acknowledgment */
#define ENAA_P5     5
#define ENAA_P4     4
#define ENAA_P3     3
#define ENAA_P2     2
#define ENAA_P1     1
#define ENAA_P0     0
/* enable rx addresses */
#define ERX_P5      5
#define ERX_P4      4
#define ERX_P3      3
#define ERX_P2      2
#define ERX_P1      1
#define ERX_P0      0
/* setup of address width */
#define AW          0 /* 2 bits */
/* setup of auto re-transmission */
#define ARD         4 /* 4 bits */
#define ARC         0 /* 4 bits */
/* RF setup register */
#define PLL_LOCK    4
#define RF_DR_HIGH  3
#define RF_PWR      1 /* 2 bits */
/* general status register */
#define RX_DR       6
#define TX_DS       5
#define MAX_RT      4
#define RX_P_NO     1 /* 3 bits */
#define TX_FULL     0
/* transmit observe register */
#define PLOS_CNT    4 /* 4 bits */
#define ARC_CNT     0 /* 4 bits */
/* fifo status */
#define TX_REUSE    6
#define FIFO_FULL   5
#define TX_EMPTY    4
#define RX_FULL     1
#define RX_EMPTY    0
/* dynamic length */
#define DPL_P0      0
#define DPL_P1      1
#define DPL_P2      2
#define DPL_P3      3
#define DPL_P4      4
#define DPL_P5      5
/* Instruction Mnemonics */
#define R_REGISTER    0x00 /* last 4 bits will indicate reg. address */
#define W_REGISTER    0x20 /* last 4 bits will indicate reg. address */
#define REGISTER_MASK 0x1F
#define R_RX_PAYLOAD  0x61
#define W_TX_PAYLOAD  0xA0
#define FLUSH_TX      0xE1
#define FLUSH_RX      0xE2
#define REUSE_TX_PL   0xE3
#define ACTIVATE      0x50
#define R_RX_PL_WID   0x60
#define NOP1          0xFF
/// hardware spi pin defined
#define LED_PIN      PORTAbits.RA1 // led test
#define CS_Pin       PORTBbits.RB0//          //set port as output
#define CE_Pin       PORTBbits.RB4         //set port as output
#define SCK_Pin      PORTBbits.RB1        //set port as output
#define Mosi_Pin     PORTBbits.RB2         //set port as output
#define Miso_Pin     PORTBbits.RB3        //set port as input
#define HIGH         1
#define LOW          0
//#ifndef NRF24
#define NRF24
uint8_t PTX;
uint8_t payload;
uint8_t channel;
uint8_t nrf24_rxFifoEmpty();
uint8_t nrf24_getStatus();
//uint8_t nrf24_configRegister();
//#include "nRF24L01.h"
//#include <stduint8_t.h>
#define LOW 0
#define HIGH 1
#define nrf24_ADDR_LEN 5
#define nrf24_CONFIG ((1<<EN_CRC)|(0<<CRCO))
#define NRF24_TRANSMISSON_OK 0
#define NRF24_MESSAGE_LOST   1
/*
nrf24_nrf24()
{
channel = 1;
payload = 16;
}
*/
 //spi pins defined for PIC16F628A
 /*
sbit Chip_Select at RB0_bit;           //
sbit SoftSpi_CLK at RB1_bit;
sbit SoftSpi_SDI at RB2_bit;
sbit SoftSpi_SDO at RB3_bit;
sbit CE_Pin_select at RB4_bit;
sbit Chip_Select_Direction at TRISB0_bit;       //csn PIN
sbit SoftSpi_CLK_Direction at TRISB1_bit;       //SCK
sbit SoftSpi_SDI_Direction at TRISB2_bit;       //MISO
sbit SoftSpi_SDO_Direction at TRISB3_bit;       //MOSI
   */
// End DAC module connections
void nrf24_ce_digitalwrite(uint8_t state)
{
if (state)
{
CE_Pin = 1;
}
else
{
CE_Pin = 0;
}
}
void nrf24_csn_digitalwrite(uint8_t state)
{
if (state)
{
CS_Pin = 1;
}
else
{
CS_Pin = 0;
}
}
void nrf24_sck_digitalwrite(uint8_t state)
{
if (state)
{
SCK_Pin = 1;
}
else
{
SCK_Pin = 0;
}
}
void nrf24_mosi_digitalwrite( uint8_t state)
{
if (state)
{
Mosi_Pin = 1;
}
else
{
Mosi_Pin = 0;
}
}
uint8_t nrf24_miso_digitalread()
{
return 1;
}
 //Clocks only one byte uint8_to the given nrf24 register */
/* software spi routine */
uint8_t spi_transfer(uint8_t tx)
{
     uint8_t i = 0;
     uint8_t rs = 0;
    nrf24_sck_digitalwrite(LOW);
    for(i=0;i<8;i++)
    {
        if(tx & 0x80) // msbit first spi standard
        {
            nrf24_mosi_digitalwrite(HIGH);
        }
        else
        {
            nrf24_mosi_digitalwrite(LOW);
        }
        nrf24_sck_digitalwrite(HIGH);
        tx = tx << 1;
        if(Miso_Pin == 1)
        {
            rs |= 0x01;
        }
        nrf24_sck_digitalwrite(LOW);
    }
    return rs;
}
void nrf24_configRegister(uint8_t reg, uint8_t value)
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
    spi_transfer(value);
    nrf24_csn_digitalwrite(HIGH);
}
/* send and receive multiple bytes over SPI */ // checked with mirf
void nrf24_transferSync(uint8_t  *dataout,uint8_t *datain,uint8_t len)
{
    uint8_t i;
    for(i=0;i<len;i++){
       datain[i] = spi_transfer(dataout[i]);
    }
}
//send multiple bytes over SPI // checked with mirf
void nrf24_transmitSync(uint8_t *dataout,uint8_t len)
{
    uint8_t i;
    for(i=0;i<len;i++){
      spi_transfer(dataout[i]);
    }
}
// init the hardware pins
void nrf24_init()
{
TRISB = 0b00001000;
TRISA = 0b00000000;
    CMCON  |= 7;
    nrf24_ce_digitalwrite(LOW);
    nrf24_csn_digitalwrite(HIGH);
}
void nrf24_powerUpRx() // checked with mirf
{
    PTX = 0;
nrf24_csn_digitalwrite(LOW);
    nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(1<<PRIM_RX)));
nrf24_csn_digitalwrite(HIGH);
    nrf24_configRegister(STATUS,(1<<TX_DS)|(1<<MAX_RT));
}
void nrf24_flushRx() // checked with mirf
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(FLUSH_RX);
    nrf24_csn_digitalwrite(HIGH);
}
// Sets the important registers in the MiRF module and powers the module
// in receiving mode
// NB: channel and payload must be set now.
void nrf24_config()  // check with mirf
{
    /* Use static payload length ... */
  //  payload_len = pay_length;
      // 1 Mbps, TX gain: 0dbm 
////////// added by me ////////
/*
    nrf24_configRegister(RF_SETUP, (0<<RF_DR_HIGH)|((0x03)<<RF_PWR));
// CRC enable, 1 byte CRC length
   nrf24_configRegister(CONFIG,nrf24_CONFIG);
    // Auto Acknowledgment
    nrf24_configRegister(EN_AA,(1<<ENAA_P0)|(1<<ENAA_P1)|(0<<ENAA_P2)|(0<<ENAA_P3)|(0<<ENAA_P4)|(0<<ENAA_P5));
    // Enable RX addresses
    nrf24_configRegister(EN_RXADDR,(1<<ERX_P0)|(1<<ERX_P1)|(0<<ERX_P2)|(0<<ERX_P3)|(0<<ERX_P4)|(0<<ERX_P5));
    // Auto retransmit delay: 1000 us and Up to 15 retransmit trials
    nrf24_configRegister(SETUP_RETR,(0x04<<ARD)|(0x0F<<ARC));
    // Dynamic length configurations: No dynamic length
    nrf24_configRegister(DYNPD,(1<<DPL_P0)|(1<<DPL_P1)|(1<<DPL_P2)|(1<<DPL_P3)|(1<<DPL_P4)|(1<<DPL_P5));
*/
////////////////MIRF SETTINGS/////////////////////////////
    // Set RF channel
    nrf24_configRegister(RF_CH,channel);
    // Set length of incoming payload
    nrf24_configRegister(RX_PW_P0, payload);
    nrf24_configRegister(RX_PW_P1, payload);
// start receiver
    nrf24_flushRx();
    nrf24_powerUpRx();// Start listening
}
/* Read single register from nrf24 */
void nrf24_readRegister(uint8_t reg,uint8_t *value,uint8_t len) //checked with mirf
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(R_REGISTER | (REGISTER_MASK & reg));
    nrf24_transferSync(value,value,len);
    nrf24_csn_digitalwrite(HIGH);
}
/* Write to a single register of nrf24 */
void nrf24_writeRegister(uint8_t reg,uint8_t *value,uint8_t len)
// Writes an array of bytes into inte the MiRF registers.
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
    nrf24_transmitSync(value,len);
    nrf24_csn_digitalwrite(HIGH);
}
void nrf24_powerUpTx() // checked with mirf
{
    PTX = 1;
    nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(0<<PRIM_RX)));
}
void nrf24_powerDown() // check with mirf
{
    nrf24_ce_digitalwrite(LOW);
    nrf24_configRegister(CONFIG,nrf24_CONFIG);
}
/* Set the RX address */
void nrf24_rx_address(uint8_t* adr) // check with mirf
{
    nrf24_ce_digitalwrite(LOW);
    nrf24_writeRegister(RX_ADDR_P1,adr,nrf24_ADDR_LEN);
    nrf24_ce_digitalwrite(HIGH);
}
/* Set the TX address */
void nrf24_tx_address(uint8_t* adr) // check with mirf
{
    /* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
    nrf24_writeRegister(RX_ADDR_P0,adr,nrf24_ADDR_LEN);
    nrf24_writeRegister(TX_ADDR,adr,nrf24_ADDR_LEN);
}
/* Checks if data is available for reading */
/* Returns 1 if data is ready ... */
  uint8_t nrf24_dataReady() // check with mirf
// checks if data is available for reading
{
    // See note in getData() function - just checking RX_DR isn't good enough
    uint8_t status = nrf24_getStatus();
 // We can short circuit on RX_DR, but if it's not set, we still need
    // to check the FIFO for any pending packets
    if ( status & (1 << RX_DR) ) return 1;
    return !nrf24_rxFifoEmpty();;
}
/* Checks if receive FIFO is empty or not */
uint8_t nrf24_rxFifoEmpty() // check with mirf
{
    uint8_t fifoStatus;
readRegister(FIFO_STATUS,&fifoStatus,sizeof(fifoStatus));
return (fifoStatus & (1 << RX_EMPTY));
}
/* Reads payload bytes uint8_to data array */
void nrf24_getData(uint8_t *data1)  // check with mirf
{
    /* Pull down chip select */
    nrf24_csn_digitalwrite(LOW);
    /* Send cmd to read rx payload */
    spi_transfer(R_RX_PAYLOAD);
    /* Read payload */
    nrf24_transferSync(data1,data1,payload);
    /* Pull up chip select */
    nrf24_csn_digitalwrite(HIGH);
    /* Reset status register */
    nrf24_configRegister(STATUS,(1<<RX_DR));
}
   
/* 
   
    
*/
/* Returns the number of retransmissions occured for the last message */
/*
uint8_t nrf24_retransmissionCount()
{
    uint8_t rv;
    nrf24_readRegister(OBSERVE_TX,&rv,1);
    rv = rv & 0x0F;
    return rv;
}
*/
// Sends a data package to the default address. Be sure to send the correct
// amount of bytes as configured as payload on the receiver.
void nrf24_send(uint8_t* value)   // check with mirf
{
uint8_t status;
    status = nrf24_getStatus();
while (PTX) {
status = nrf24_getStatus();
    if((status & ((1 << TX_DS)  | (1 << MAX_RT)))){
   PTX = 0;
   break;
   }
    }                  // Wait until last paket is send
    /* Go to Standby-I first */
    nrf24_ce_digitalwrite(LOW);
    /* Set to transmitter mode , Power up if needed */
    nrf24_powerUpTx();
nrf24_csn_digitalwrite(LOW);
spi_transfer(FLUSH_TX);
nrf24_csn_digitalwrite(HIGH);
   
    /* Pull down chip select */
    nrf24_csn_digitalwrite(LOW);
    /* Write cmd to write payload */
    spi_transfer(W_TX_PAYLOAD);
    /* Write payload */
    nrf24_transmitSync(value,payload);
    /* Pull up chip select */
    nrf24_csn_digitalwrite(HIGH);
    /* Start the transmission */
    nrf24_ce_digitalwrite(HIGH);
}
/**
 * isSending.
 *
 * Test if chip is still sending.
 * When sending has finished return chip to listening.
 *
 */
uint8_t nrf24_isSending()  // CHECK with mirf
{
    uint8_t status;
if(PTX){
    /* read the current status */
    status = nrf24_getStatus();
    /* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
    if((status & ((1 << TX_DS)  | (1 << MAX_RT))))
    {
nrf24_powerUpRx();
        return 0; /* false */
    }
    return 1; /* true */
}
return 0; /* false */
}
uint8_t nrf24_getStatus()    // checked with mirf
{
    uint8_t rv;
    nrf24_readRegister(STATUS,&rv,1);
    return rv;
}
//before main initilization
uint8_t temp;
uint8_t q = 0;
uint8_t data_array[4];
uint8_t tx_address[5] = {0xE8,0xE8,0xF0,0xFC,0xE1};  // on receiver this should be rx_address
uint8_t rx_address[5] = {0xE8,0xE8,0xF0,0xFC,0xD1};  // on receiver this should be tx_address
uint8_t temp1,temp2;
void main() {  
/* init hardware pins */
    nrf24_init();
    
    /* Channel #2 , payload length: 4 */
    nrf24_config(2,4);
    /* Set the device addresses */
    nrf24_tx_address(tx_address);
    nrf24_rx_address(rx_address);    
while(1)
{
  
         LED_PIN = HIGH;          
        /* Fill the data buffer */
        data_array[0] = 111;
        data_array[1] = 0X00;
        data_array[2] = 0x00;
        data_array[3] = 0X00;                                    
        /* Automatically goes to TX mode */
        nrf24_send(data_array);        
        __delay_ms(10);
        /* Wait for transmission to end */
        while(nrf24_isSending());
      //  __delay_ms(2);
/* Optionally, go back to RX mode ... */
   nrf24_powerUpRx();
/* Or you might want to power down after TX */
//	 nrf24_powerDown();            
/* Wait a little ... */
__delay_ms(10);
}
}

My RX Code:-

#include <xc.h>
#include <htc.h>
__CONFIG(FOSC_INTOSCIO & WDTE_OFF & PWRTE_OFF & MCLRE_OFF & BOREN_OFF & LVP_OFF & CPD_OFF & CP_OFF);
#define	_XTAL_FREQ	4000000
#include "stdint.h"
/* Memory Map */
#define CONFIG      0x00
#define EN_AA       0x01
#define EN_RXADDR   0x02
#define SETUP_AW    0x03
#define SETUP_RETR  0x04
#define RF_CH       0x05
#define RF_SETUP    0x06
#define STATUS      0x07
#define OBSERVE_TX  0x08
#define CD          0x09
#define RX_ADDR_P0  0x0A
#define RX_ADDR_P1  0x0B
#define RX_ADDR_P2  0x0C
#define RX_ADDR_P3  0x0D
#define RX_ADDR_P4  0x0E
#define RX_ADDR_P5  0x0F
#define TX_ADDR     0x10
#define RX_PW_P0    0x11
#define RX_PW_P1    0x12
#define RX_PW_P2    0x13
#define RX_PW_P3    0x14
#define RX_PW_P4    0x15
#define RX_PW_P5    0x16
#define FIFO_STATUS 0x17
#define DYNPD       0x1C
/* Bit Mnemonics */
/* configuratio nregister */
#define MASK_RX_DR  6
#define MASK_TX_DS  5
#define MASK_MAX_RT 4
#define EN_CRC      3
#define CRCO        2
#define PWR_UP      1
#define PRIM_RX     0
/* enable auto acknowledgment */
#define ENAA_P5     5
#define ENAA_P4     4
#define ENAA_P3     3
#define ENAA_P2     2
#define ENAA_P1     1
#define ENAA_P0     0
/* enable rx addresses */
#define ERX_P5      5
#define ERX_P4      4
#define ERX_P3      3
#define ERX_P2      2
#define ERX_P1      1
#define ERX_P0      0
/* setup of address width */
#define AW          0 /* 2 bits */
/* setup of auto re-transmission */
#define ARD         4 /* 4 bits */
#define ARC         0 /* 4 bits */
/* RF setup register */
#define PLL_LOCK    4
#define RF_DR_HIGH  3
#define RF_PWR      1 /* 2 bits */
/* general status register */
#define RX_DR       6
#define TX_DS       5
#define MAX_RT      4
#define RX_P_NO     1 /* 3 bits */
#define TX_FULL     0
/* transmit observe register */
#define PLOS_CNT    4 /* 4 bits */
#define ARC_CNT     0 /* 4 bits */
/* fifo status */
#define TX_REUSE    6
#define FIFO_FULL   5
#define TX_EMPTY    4
#define RX_FULL     1
#define RX_EMPTY    0
/* dynamic length */
#define DPL_P0      0
#define DPL_P1      1
#define DPL_P2      2
#define DPL_P3      3
#define DPL_P4      4
#define DPL_P5      5
/* Instruction Mnemonics */
#define R_REGISTER    0x00 /* last 4 bits will indicate reg. address */
#define W_REGISTER    0x20 /* last 4 bits will indicate reg. address */
#define REGISTER_MASK 0x1F
#define R_RX_PAYLOAD  0x61
#define W_TX_PAYLOAD  0xA0
#define FLUSH_TX      0xE1
#define FLUSH_RX      0xE2
#define REUSE_TX_PL   0xE3
#define ACTIVATE      0x50
#define R_RX_PL_WID   0x60
#define NOP1          0xFF
/// hardware spi pin defined
#define LED_PIN      PORTAbits.RA1 // led test
#define CS_Pin       PORTBbits.RB0//          //set port as output
#define CE_Pin       PORTBbits.RB4         //set port as output
#define SCK_Pin      PORTBbits.RB1        //set port as output
#define Mosi_Pin     PORTBbits.RB2         //set port as output
#define Miso_Pin     PORTBbits.RB3        //set port as input
#define HIGH         1
#define LOW          0
//#ifndef NRF24
#define NRF24
uint8_t PTX;
uint8_t payload;
uint8_t channel;
uint8_t nrf24_rxFifoEmpty();
uint8_t nrf24_getStatus();
//uint8_t nrf24_configRegister();
//#include "nRF24L01.h"
//#include <stduint8_t.h>
#define LOW 0
#define HIGH 1
#define nrf24_ADDR_LEN 5
#define nrf24_CONFIG ((1<<EN_CRC)|(0<<CRCO))
#define NRF24_TRANSMISSON_OK 0
#define NRF24_MESSAGE_LOST   1
/*
nrf24_nrf24()
{
channel = 1;
payload = 16;
}
*/
 //spi pins defined for PIC16F628A
 /*
sbit Chip_Select at RB0_bit;           //
sbit SoftSpi_CLK at RB1_bit;
sbit SoftSpi_SDI at RB2_bit;
sbit SoftSpi_SDO at RB3_bit;
sbit CE_Pin_select at RB4_bit;
sbit Chip_Select_Direction at TRISB0_bit;       //csn PIN
sbit SoftSpi_CLK_Direction at TRISB1_bit;       //SCK
sbit SoftSpi_SDI_Direction at TRISB2_bit;       //MISO
sbit SoftSpi_SDO_Direction at TRISB3_bit;       //MOSI
   */
// End DAC module connections
void nrf24_ce_digitalwrite(uint8_t state)
{
if (state)
{
CE_Pin = 1;
}
else
{
CE_Pin = 0;
}
}
void nrf24_csn_digitalwrite(uint8_t state)
{
if (state)
{
CS_Pin = 1;
}
else
{
CS_Pin = 0;
}
}
void nrf24_sck_digitalwrite(uint8_t state)
{
if (state)
{
SCK_Pin = 1;
}
else
{
SCK_Pin = 0;
}
}
void nrf24_mosi_digitalwrite( uint8_t state)
{
if (state)
{
Mosi_Pin = 1;
}
else
{
Mosi_Pin = 0;
}
}
uint8_t nrf24_miso_digitalread()
{
return 1;
}
 //Clocks only one byte uint8_to the given nrf24 register */
/* software spi routine */
uint8_t spi_transfer(uint8_t tx)
{
     uint8_t i = 0;
     uint8_t rs = 0;
    nrf24_sck_digitalwrite(LOW);
    for(i=0;i<8;i++)
    {
        if(tx & 0x80) // msbit first spi standard
        {
            nrf24_mosi_digitalwrite(HIGH);
        }
        else
        {
            nrf24_mosi_digitalwrite(LOW);
        }
        nrf24_sck_digitalwrite(HIGH);
        tx = tx << 1;
        if(Miso_Pin == 1)
        {
            rs |= 0x01;
        }
        nrf24_sck_digitalwrite(LOW);
    }
    return rs;
}
void nrf24_configRegister(uint8_t reg, uint8_t value)
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
    spi_transfer(value);
    nrf24_csn_digitalwrite(HIGH);
}
/* send and receive multiple bytes over SPI */ // checked with mirf
void nrf24_transferSync(uint8_t  *dataout,uint8_t *datain,uint8_t len)
{
    uint8_t i;
    for(i=0;i<len;i++){
       datain[i] = spi_transfer(dataout[i]);
    }
}
//send multiple bytes over SPI // checked with mirf
void nrf24_transmitSync(uint8_t *dataout,uint8_t len)
{
    uint8_t i;
    for(i=0;i<len;i++){
      spi_transfer(dataout[i]);
    }
}
// init the hardware pins
void nrf24_init()
{
TRISB = 0b00001000;
TRISA = 0b00000000;
    CMCON  |= 7;
    nrf24_ce_digitalwrite(LOW);
    nrf24_csn_digitalwrite(HIGH);
}
void nrf24_powerUpRx() // checked with mirf
{
    PTX = 0;
nrf24_csn_digitalwrite(LOW);
    nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(1<<PRIM_RX)));
nrf24_csn_digitalwrite(HIGH);
    nrf24_configRegister(STATUS,(1<<TX_DS)|(1<<MAX_RT));
}
void nrf24_flushRx() // checked with mirf
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(FLUSH_RX);
    nrf24_csn_digitalwrite(HIGH);
}
// Sets the important registers in the MiRF module and powers the module
// in receiving mode
// NB: channel and payload must be set now.
void nrf24_config()  // check with mirf
{
    /* Use static payload length ... */
  //  payload_len = pay_length;
      // 1 Mbps, TX gain: 0dbm 
////////// added by me ////////
    nrf24_configRegister(RF_SETUP, (0<<RF_DR_HIGH)|((0x03)<<RF_PWR));
// CRC enable, 1 byte CRC length
   nrf24_configRegister(CONFIG,nrf24_CONFIG);
    // Auto Acknowledgment
    nrf24_configRegister(EN_AA,(1<<ENAA_P0)|(1<<ENAA_P1)|(0<<ENAA_P2)|(0<<ENAA_P3)|(0<<ENAA_P4)|(0<<ENAA_P5));
    // Enable RX addresses
    nrf24_configRegister(EN_RXADDR,(1<<ERX_P0)|(1<<ERX_P1)|(0<<ERX_P2)|(0<<ERX_P3)|(0<<ERX_P4)|(0<<ERX_P5));
    // Auto retransmit delay: 1000 us and Up to 15 retransmit trials
    nrf24_configRegister(SETUP_RETR,(0x04<<ARD)|(0x0F<<ARC));
    // Dynamic length configurations: No dynamic length
    nrf24_configRegister(DYNPD,(1<<DPL_P0)|(1<<DPL_P1)|(1<<DPL_P2)|(1<<DPL_P3)|(1<<DPL_P4)|(1<<DPL_P5));
////////////////MIRF SETTINGS/////////////////////////////
    // Set RF channel
    nrf24_configRegister(RF_CH,channel);
    // Set length of incoming payload
    nrf24_configRegister(RX_PW_P0, payload);
    nrf24_configRegister(RX_PW_P1, payload);
// start receiver
    nrf24_flushRx();
    nrf24_powerUpRx();// Start listening
}
/* Read single register from nrf24 */
void nrf24_readRegister(uint8_t reg,uint8_t *value,uint8_t len) //checked with mirf
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(R_REGISTER | (REGISTER_MASK & reg));
    nrf24_transferSync(value,value,len);
    nrf24_csn_digitalwrite(HIGH);
}
/* Write to a single register of nrf24 */
void nrf24_writeRegister(uint8_t reg,uint8_t *value,uint8_t len)
// Writes an array of bytes into inte the MiRF registers.
{
    nrf24_csn_digitalwrite(LOW);
    spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
    nrf24_transmitSync(value,len);
    nrf24_csn_digitalwrite(HIGH);
}
void nrf24_powerUpTx() // checked with mirf
{
    PTX = 1;
    nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(0<<PRIM_RX)));
}
void nrf24_powerDown() // check with mirf
{
    nrf24_ce_digitalwrite(LOW);
    nrf24_configRegister(CONFIG,nrf24_CONFIG);
}
/* Set the RX address */
void nrf24_rx_address(uint8_t* adr) // check with mirf
{
    nrf24_ce_digitalwrite(LOW);
    nrf24_writeRegister(RX_ADDR_P0,adr,nrf24_ADDR_LEN);
    nrf24_ce_digitalwrite(HIGH);
}
/* Set the TX address */
void nrf24_tx_address(uint8_t* adr) // check with mirf
{
    /* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
    nrf24_writeRegister(RX_ADDR_P1,adr,nrf24_ADDR_LEN);
    nrf24_writeRegister(TX_ADDR,adr,nrf24_ADDR_LEN);
}
/* Checks if data is available for reading */
/* Returns 1 if data is ready ... */
  uint8_t nrf24_dataReady() // check with mirf
// checks if data is available for reading
{
    // See note in getData() function - just checking RX_DR isn't good enough
    uint8_t status = nrf24_getStatus();
 // We can short circuit on RX_DR, but if it's not set, we still need
    // to check the FIFO for any pending packets
    if ( status & (1 << RX_DR) ) return 1;
    return !nrf24_rxFifoEmpty();;
}
/* Checks if receive FIFO is empty or not */
uint8_t nrf24_rxFifoEmpty() // check with mirf
{
    uint8_t fifoStatus;
readRegister(FIFO_STATUS,&fifoStatus,sizeof(fifoStatus));
return (fifoStatus & (1 << RX_EMPTY));
}
/* Reads payload bytes uint8_to data array */
void nrf24_getData(uint8_t *data1)  // check with mirf
{
    /* Pull down chip select */
    nrf24_csn_digitalwrite(LOW);
    /* Send cmd to read rx payload */
    spi_transfer(R_RX_PAYLOAD);
    /* Read payload */
    nrf24_transferSync(data1,data1,payload);
    /* Pull up chip select */
    nrf24_csn_digitalwrite(HIGH);
    /* Reset status register */
    nrf24_configRegister(STATUS,(1<<RX_DR));
}
   
/* 
   
    
*/
/* Returns the number of retransmissions occured for the last message */
/*
uint8_t nrf24_retransmissionCount()
{
    uint8_t rv;
    nrf24_readRegister(OBSERVE_TX,&rv,1);
    rv = rv & 0x0F;
    return rv;
}
*/
// Sends a data package to the default address. Be sure to send the correct
// amount of bytes as configured as payload on the receiver.
void nrf24_send(uint8_t* value)   // check with mirf
{
uint8_t status;
    status = nrf24_getStatus();
while (PTX) {
status = nrf24_getStatus();
    if((status & ((1 << TX_DS)  | (1 << MAX_RT)))){
   PTX = 0;
   break;
   }
    }                  // Wait until last paket is send
    /* Go to Standby-I first */
    nrf24_ce_digitalwrite(LOW);
    /* Set to transmitter mode , Power up if needed */
    nrf24_powerUpTx();
nrf24_csn_digitalwrite(LOW);
spi_transfer(FLUSH_TX);
nrf24_csn_digitalwrite(HIGH);
   
    /* Pull down chip select */
    nrf24_csn_digitalwrite(LOW);
    /* Write cmd to write payload */
    spi_transfer(W_TX_PAYLOAD);
    /* Write payload */
    nrf24_transmitSync(value,payload);
    /* Pull up chip select */
    nrf24_csn_digitalwrite(HIGH);
    /* Start the transmission */
    nrf24_ce_digitalwrite(HIGH);
}
/**
 * isSending.
 *
 * Test if chip is still sending.
 * When sending has finished return chip to listening.
 *
 */
uint8_t nrf24_isSending()  // CHECK with mirf
{
    uint8_t status;
if(PTX){
    /* read the current status */
    status = nrf24_getStatus();
    /* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
    if((status & ((1 << TX_DS)  | (1 << MAX_RT))))
    {
nrf24_powerUpRx();
        return 0; /* false */
    }
    return 1; /* true */
}
return 0; /* false */
}
uint8_t nrf24_getStatus()    // checked with mirf
{
    uint8_t rv;
    nrf24_readRegister(STATUS,&rv,1);
    return rv;
}
//before main initilization
uint8_t temp;
uint8_t q = 0;
uint8_t data_array[4];
uint8_t tx_address[5] = {0xE8,0xE8,0xF0,0xFC,0xE1};  // on receiver this should be rx_address
uint8_t rx_address[5] = {0xE8,0xE8,0xF0,0xF0,0xE1};  // on receiver this should be tx_address //E8E8F0F0E1
//uint8_t readRegister;
void main() {  
/* init hardware pins */
    nrf24_init();
    
   
    /* Channel #2 , payload length: 4 */
    nrf24_config(76,4);
  
    /* Set the device addresses */
    nrf24_tx_address(tx_address);
    nrf24_rx_address(rx_address);    
      nrf24_powerUpRx();
while(1)
//if(nrf24_dataReady();)
{
 nrf24_getData(data_array);  
if(data_array[0] == 111)
{
LED_PIN = HIGH;
}
else
{
LED_PIN = LOW;
}
}
}