Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

SPI with 16 bit registers and not 8 bit.

X

Xenon02

Guest
Hello !

I want to a quick question about SPI.
I've read alot about them and usually the SPI is shown with 8 bit registers like here :

1699311536326.png


And I've seen some videos and info that SPI usually have 16 bit registers and not 8 bit.



The thing is I am not sure what happens with one situation.
If I want to transmit 1 byte and receive 2 bytes then in total the whole transaction is 3 byte. So what happens with 4-th byte ? I know that 1st byte transmitted the master will receive dummy byte, and 2 bytes received by slave, the master will transmit 2 dummy bytes, but the 4th byte ? Is the 4th byte both dummy from master and dummy from slave ? Because the full transaction between Master and Slave for 16 bit register must be minimally 16 bits and not 8 bits like in the picture.

Second question is that whenever Master or Slave want's to transmit information the other side automatically fulls it's register with dummy byte ? For example Slave sends data to Master then Master fills his register with dummy byte and sends it ? Usually these dummy bytes are ignored but It's good to know if it's a hardware thing or what that fills the registers with something(like okey now slave you receive data so you must clear your register with "0"). Like what is connected more to shift registers ? What clears the registers and puts in dummy byte or data byte ? Dummy byte are usually "0" so there must be another register or something that puts into these register this "0" dummy byte. And I know that dummy byte doesn't have to be "0" or "1" it can be any random data.

It's hard to imagine this clear phase with simple picture (I've checked some more complex pictures but It was to complicated).

PS.
I came up with another thing : how it does that the Slave doesn't read the dummy bytes, how he ignores them (I know that R/W bite can be a solution but !), there was one example where I had to use Write bite to send dummy bytes so how does the device know that it is a dummy byte and not an overwrite data when it says (send dummy bytes 5-8) ? If I send 6 is it enough ? How does it know?
 
Last edited by a moderator:
Hi,

Please give detailed informations.

And I've seen some videos and info that SPI usually have 16 bit registers and not 8 bit.
"I've seen some video" without a link to the video makes a discussion useless.
* the video may give wrong informations
* the video may give informations that does not fit to your slave
* the video may give informations that does not fit to your master
* you may have misunderstood some informations
* something else
We can not know what happens. Thus:
--> Post a link to video.

If I want to transmit 1 byte and receive 2 bytes then in total the whole transaction is 3 byte.
If you want to transmit 1 byte, then send 1 byte,
if you want to receive 2 bytes, then you have to send 2 bytes.

Some rules:
* SPI is designed for 8 bit wide access. If you want 16 bit, then use 2x 8bit. ( some massters/ slaves may support special modes)
* Sending out via MOSI is always in parallel with receiving via MISO
* if you don't need to receive, then simply dismiss the received byte
* if you want to receive 8 bits, you always need to send 8 bits (a so called dummy byte) to create the 8x SCK cycles

Slave:
How sending and recieving is handled (which bytes containes invalid / valid data ... and their meaning ... tells the slave's datasheet.
--> Thus for a meaningful communication example it's urgent to tell which slave you want to communicate with. Link to datasheet!
The master's software needs to be adjusted to the slave.

Master:
* Each master is expected to support 8 bits.
* There may be masters that additionally support 16 bit or even 32 bit access (to optimize processing time), then the master's datasheet tells you how to handle this. --> Link to datasheet

There is no general R/W bit in SPI.
If you have a slave that supports an R/W bit, then it's function is explained in the according datasheet.

--> So do yourself a favour and give specific informations.

Klaus
 
Hello !
"I've seen some video" without a link to the video makes a discussion useless.
* the video may give wrong informations
* the video may give informations that does not fit to your slave
* the video may give informations that does not fit to your master
* you may have misunderstood some informations
* something else
We can not know what happens. Thus:
--> Post a link to video.

Of course sorry

- with a specific time. Which showed that STM32 had 16 bit registers for Master. So I thought that maybe Nucleo as well have 16 bit so how it works. Must it send fully 16 bits or can it send 8 bits and the transaction is cutted ? Thus the registers again restarts.
If you want to transmit 1 byte, then send 1 byte,
if you want to receive 2 bytes, then you have to send 2 bytes.

Of course but I was wondering if master and slave are 16 bits then they must send all 16 bits to works properly ? Asking it generally because I know for 8 bit they must send the whole 8 bits.
Some rules:
* SPI is designed for 8 bit wide access. If you want 16 bit, then use 2x 8bit. ( some massters/ slaves may support special modes)
* Sending out via MOSI is always in parallel with receiving via MISO
* if you don't need to receive, then simply dismiss the received byte
* if you want to receive 8 bits, you always need to send 8 bits (a so called dummy byte) to create the 8x SCK cycles
I haven't understood the second points. Isn't MOSI and MISO aren't in series ? I mean the registers shifting in series to the other registers.
And how is the dummy byte created ? Is there another register parallely connected to the SPI registers to send set it's data into dummy byte ? I ask theoretycally how it could works and why it works if it's something automatically is done.
Slave:
How sending and recieving is handled (which bytes containes invalid / valid data ... and their meaning ... tells the slave's datasheet.
--> Thus for a meaningful communication example it's urgent to tell which slave you want to communicate with. Link to datasheet!
The master's software needs to be adjusted to the slave.

Master:
* Each master is expected to support 8 bits.
* There may be masters that additionally support 16 bit or even 32 bit access (to optimize processing time), then the master's datasheet tells you how to handle this. --> Link to datasheet

There is no general R/W bit in SPI.
If you have a slave that supports an R/W bit, then it's function is explained in the according datasheet.

--> So do yourself a favour and give specific informations.


Yes Slave and Master have their own datasheet, I was just asking generally how it works.
R/W bits aren't SPI specifically, I just gave an example of how the Slave device know when he Sends data and when he Receives.

But I was just wondering how are these things automated, how devices usually know when to reset/fill with any random info the SPI registers and how do they do that. Or like with https://esp32.com/viewtopic.php?t=11218 - I found this randomly trying to understand the dummy bytes. In the link it says minimum dummy bytes is 6 but under the chart it says dummys (8 bytes). Like min-max, so how does he know that 6 bytes is dummy and another one will be data byte ??? Is there some sort of mechanism hardware thing ?
 
Hi,

"STM32" is not specific, I don't want to investigate which microcontroller is used with your Nucleo board, nor do I do the search for the microcontroller datasheet.
--> It's your job.

Of course but I was wondering if master and slave are 16 bits then they must send all 16 bits to works properly ? Asking it generally because I know for 8 bit they must send the whole 8 bits.
I've already answered this. Generally.

Isn't MOSI and MISO aren't in series ?
In some masters / slaves maybe. I've already explained: It depends.
I asked for clear informations about master and slave. I still miss.

R/W bits aren't SPI specifically, I just gave an example of how the Slave device know when he Sends data and when he Receives.
So you know RW is something slave_specific ... then it makes no sense to refuse to tell which "specific" device you are talking about.
It just makes helping unnecessary difficult.

A "dummy byte" usually is just 8 bits, where the values of the bits have no meaning. It does not matter whether it's 0x00, 0xFF or any other value inbetween.

***

With SPI, there is not much "defined generally".

Most of your questions and ideas are "specific to some devices". It is impossible to discuss them in general.

Klaus
 
I've already answered this. Generally.
I didn't understand it that's why I asked the question again.
You've said it is usually 8 bits when it comes to SPI, but what if it's 16 bits like in the video :

Which only give me question does it have to send all 16 bits ? Or maybe not ? Is it also a device specific or maybe it is more of a SPI general thing ?
In some masters / slaves maybe. I've already explained: It depends.
I asked for clear informations about master and slave. I still miss.

I was just theorized no specific devices. Any specific device I saw and tried to speculate I've linked. First one was the video on how youtuber did his SPI protocol, and the other website which I've glanced and couldn't find the datasheet only the device name TW8035.

I've provided as much as I could and I don't know what more I can provide or where to find it.
So you know RW is something slave_specific ... then it makes no sense to refuse to tell which "specific" device you are talking about.
It just makes helping unnecessary difficult.

Hmmm let's say it was I3G4250D, datasheet : https://www.st.com/resource/en/datasheet/i3g4250d.pdf - Provided.
A "dummy byte" usually is just 8 bits, where the values of the bits have no meaning. It does not matter whether it's 0x00, 0xFF or any other value inbetween.
So I thought correctly about dummy bytes.
With SPI, there is not much "defined generally".

Most of your questions and ideas are "specific to some devices". It is impossible to discuss them in general.
You are probably right I was just wondering how they do this.
SPI itself is just 2 registers sending each other data with CS/SS pin to select Slave and CLK/SCLK a clock.

I just wondered how the deviced know what to read or what to ignore from Slave registers. Or with the dummy bytes like in this link : https://esp32.com/viewtopic.php?t=11218 which was a big mystery for me because it was all I had and it was written 6 dummy bytes min and under it dummys (8 bytes) so I concluded that min is 6 bytes and max i 8 bytes but how does he know which are the dummy bytes and which not. I've sent like 6 bytes and the next byte is data byte but it will interpret it as a dummy. Which is weird. If you know what do I mean, like how does he know that now I've sent not a dummy byte even though it sits in it's range between of 6-8 bytes.

This is ofcourse device specified but it was curious. Sorry for not having more information.

Hi,

"STM32" is not specific, I don't want to investigate which microcontroller is used with your Nucleo board, nor do I do the search for the microcontroller datasheet.
--> It's your job.
STM32 NucleoL073RZ.
 
SPI transfer size is a multiple of 8 bits. Full stop. A general purpose SPI master is required to support it, and any STM32 processor surely does. STM32 additionally supports 16-bit frame format, you can use it if it fits your application.
 
SPI transfer size is a multiple of 8 bits. Full stop. A general purpose SPI master is required to support it, and any STM32 processor surely does. STM32 additionally supports 16-bit frame format, you can use it if it fits your application.

They share the same register which is 16 bits if it also supports 16-bit frame format ?
Tell me if I am correct if it works in 8 bit format then it every 8 bit it stops sending and resets it content ? If it's 16 bit the it must send full 16 bit ? Or it can also stop at 8 bit ? This is more of a SPI question or is it as well device specific ?

If so how STM handles it ? Because I know how 8 bit registers work though I can't imagine how 16 bit registers work in general I don't understand it. 8 bit is 8 bit and it always fully sends it's data but 16 bit ? How it allocates the received data and does it also has to send full 16 bits like with the 8 bit registers or perhaps this 16 bit register doesn't have to send all 16 bits and can stop sending somehow with only 8 bits ?
--- Updated ---

Like I have imagined it that way for 16 bit format.

If it receives 2 bytes like 00000001 and 00000010 then in register it looks like that 00000001 00000010 which first byte is 1 and second byte is 2.

If I want to receive 3 bytes then like before I had 00000001 00000010 and next data is sent which will be 00000011

So I have now in register 00000000 00000011 which the third byte of data is placed as if it is a 4th byte of data. So if it works in 16 bit format it must fully send 16 bit ? Because the. The third byte is shifted in the right place 00000011 00000000 the last byte was like a dummy byte or something.

Only speculations, maybe it also depends on the device and somehow master can read properly the register although the third byte is placed in place as if it is the fourth byte of data.

Same would go with sending. Because usually it is one byte.

In 8 bit framework I believe it works also on the same 16 bit register but it works that first 8 bits are transmit and last 8 bytes works as receive in slave it is opposite. So that's why they work in 8 bit framework even though they have 16 bits.

Perhaps it also depends on device, but It is interesting because usually I use only HAL_SPI commands without thinking what format it sends so I wondered how they handle them. How they are compatible.
 
Last edited by a moderator:
Hi,

A last try:
You want to bake a cake. It needs 16 eggs.
But the eggs are only sold in 8 piece packages.

Can you solve the problem?

Klaus
 
Hi,

A last try:
You want to bake a cake. It needs 16 eggs.
But the eggs are only sold in 8 piece packages.

Can you solve the problem?

Klaus

Have to buy 2 packs.

So even if the register is 16 bits it will still send 8 bits no matter the SPI-bit frame format ?
And like the similar problem with 3 bytes. In which 3rd byte lands in the place of the 4th byte but the 4th byte won't be sent.

I understand you when it comes to 8 bit format in which we send 8 bit and receive 8 bit so sending 3 bytes require sendings and there won't be any gaps like with 16 bit format. Although the thing is that 8 bit format works in the same register which is 16 bit.

Sorry for annoying you if I do this. I might have still not understood your answer because I was hoping for correction from my last post.
 
I'm just confused with 16 bit register and 16 bit format.
Like reading 3 bytes might be a device specific like you said but I don't understand it, when first and second byte are correctly placed in register and the 3rd byte is in the place where normally the 4th byte should be but we don't or we do load this dummy byte or data to sit in the place on 4th byte pushing the 3rd byte into his place ?
Confusing for me.

Same when it is 8 bit format but the register is still 16 bit, so I wondered how it is solved to work.

My imagination of SPI was locked with 8 bit format with 8 bit registers but since I've seen the video that the registors have 16 bit registors and not 8 bit then I got really confused on how these SPI works. The placement of bytes and how it reads it (like the situation with the 3rd byte placed in the place where the 4th byte would be placed or if we read only 1st byte then it is placed also in the place of 2nd byte so every odd number of bytes makes it confusing).

Sorry again, I believe I didn't disturb you so much with my bucket head understanding ;>
 
Hi,

how often do we need to say that general SPI data format is 8 bits.

STM32 can work with 8 bit format. Why not use this standard format?
Just because it additionally is able to work with non standard 16 bit format, does not mean you need to use it.
I mean, it just makes communication "non standard" and thus complicated.

* If you need 8eggs, 16, 24, 32 .... you are happy to work with 8 egg packet size.
* But if you need 8 eggs .... it makes it complicated to work with 16 bit packet size.

Klaus
 
how often do we need to say that general SPI data format is 8 bits.

STM32 can work with 8 bit format. Why not use this standard format?
Just because it additionally is able to work with non standard 16 bit format, does not mean you need to use it.

I'm not saying to not use the 8 bit format. Just asking questions how it works if it was in 16 bit format.

Plus both 8 bit format and 16 bit format works in the same register which is 16 bit register.
That's why I was wondering how it could work with 16 bit packet size when I need non regular ammount of eggs like 8, 24 etc.

Well it somehow works I guess, then correct me if I'm wrong, for 8 bit format in 16 bit register in Master the first 8 bits are the transmit bits and the last 8 bits are the received bits always, the opposite is then for slave. It would make sense in a way of receiving/sending 8 bit formats.

For 16 bit format it works "weird" for non regular size. Because all 16 bits on the register can be used for anything.

That is only a theory behind 16 bit register and how it could be usually handled, because as I said I only saw the examples where 8 bit format was in 8 bit registers like in the picture from post nr.1 so I couldn't understand the 16 bit registers.

Sorry and thank you :>
 
That's why I was wondering how it could work with 16 bit packet size when I need non regular ammount of eggs like 8, 24 etc.
You don't understand that 8, 24 are very regular ammount of eggs. It's standard. It's easy to transmit 1 packet, 3 packets of 8 eggs each.
But your 16 bit packet size is non standard. You make it difficult. Unnecessary difficult.

--> Keep on standard. Keep on 8 bit packet size. Works. Easy. For every SPI slave.

Why using non standard .. where is no need to ... then expecting problems (that not existed before) .... then looking for non standard solutions for self made problems.
I don't even see a benefit in using 16 bit packet size on an STM32 at all. Do you see a benefit?
If there is no benefit ... why does one even consider it?

Don't get me wrong. I'm happy to find a solution for a real problem.
But I don't want to spend my time on "how to generate unnecessary problems".

Klaus
 
Hello !

I want to a quick question about SPI.

My quick answer, just take the byte as it comes, throw away (zero)
the uppers, build whatever structure you like with what you caught,
any worthy uC should have plenty of clocks to spare at soggy SPI
rates.
 
Why using non standard .. where is no need to ... then expecting problems (that not existed before) .... then looking for non standard solutions for self made problems.

I saw someone did it like in the video and tried to answer what if I want to send more data etc.
Maybe for optimazing the proccesing time like you've said here :
* There may be masters that additionally support 16 bit or even 32 bit access (to optimize processing time), then the master's datasheet tells you how to handle this. --> Link to datasheet


---------------------------------
I don't even see a benefit in using 16 bit packet size on an STM32 at all. Do you see a benefit?
If there is no benefit ... why does one even consider it?

Don't get me wrong. I'm happy to find a solution for a real problem.
But I don't want to spend my time on "how to generate unnecessary problems".

Maybe there is no benifit behind it, but tried to understand how it worked.

And I know this is not really a real problem, but let's say I want to make SPI from the ground, then not understanding how it works from both sides might make this communication impossible plus this register size as well.

At least if not with 16 bit format tell me if my thinking for 8 bit format is correct ? Wanted to think at least this is correct from me because I understand how 8 bit format works in 8 bit registers and I wanted to know if I understand the 8 bit format in 16 bit registers.
Well it somehow works I guess, then correct me if I'm wrong, for 8 bit format in 16 bit register in Master the first 8 bits are the transmit bits and the last 8 bits are the received bits always, the opposite is then for slave. It would make sense in a way of receiving/sending 8 bit formats.

If it's correct then maybe someday I will figure out how the 16 bit format works maybe ... Because it buggs me off when I think about it. Like I don't understand the SPI at all but I wanted to understand it at some point.
--- Updated ---

Maybe for optimazing the proccesing time like you've said here :
* There may be masters that additionally support 16 bit or even 32 bit access (to optimize processing time), then the master's datasheet tells you how to handle this. --> Link to datasheet

I also understand that you don't know what happens when SPI is in 16 bit format ? And you don't know what happens in situations like this ? :
My imagination of SPI was locked with 8 bit format with 8 bit registers but since I've seen the video that the registors have 16 bit registors and not 8 bit then I got really confused on how these SPI works. The placement of bytes and how it reads it (like the situation with the 3rd byte placed in the place where the 4th byte would be placed or if we read only 1st byte then it is placed also in the place of 2nd byte so every odd number of bytes makes it confusing).

You don't understand that 8, 24 are very regular ammount of eggs. It's standard. It's easy to transmit 1 packet, 3 packets of 8 eggs each.
But your 16 bit packet size is non standard. You make it difficult. Unnecessary difficult.

Yes 8,24 is regular size. I indicated the 16 bit format in case of receiving 8 bit or 24 bit (placement and interpretation of what it received) or any other amount like 16 bit as well. And it is only 8 bit so in format of 16 bit I thought it must send full 16 bits so to make this 16 pack full, so maybe dummy bytes ? I don't know.

Well I want to know atleast about my 8 bit format and 16 bit register case I wrote above. Maybe someday I will understand 16 bit format if it is used anywhere.

PS.
http://www.efton.sk/STM32/gotcha/g22.html
https://community.st.com/t5/stm32-mcus-products/why-would-spi-send-16-bits-instead-of-8/td-p/120501

Something about 16 bit format. Like writing 1 byte but it sends 2 bytes or just changing the pack size etc.
So it is used, and wanted to know what if ...
 
Last edited by a moderator:
Maybe for optimazing the proccesing time like you've said here :
You can optimize only where it is possible to do so.

I´m fine you optimize to 16 bit packets when ALL of your slaves can work with 16 bit packets or multiples.

But you asked how to handle 8 bit access.
And again, it´s the same as with the eggs. If you have standard 8 bit boxes you can serve every customer that wants 8, 16, 24, 23 eggs.
But you have a problem if you change to 16 egg boxes and a customer asks for 8 or 24 eggs.

*******
let's say I want to make SPI from the ground

Then start understanding the standard before you go the special cases!
Simply use the 8 bit standard!
*****

At least if not with 16 bit format tell me if my thinking for 8 bit format is correct ?I´ve already told you. Now repeated:It´s not a question of correct thinking, it´s a question on how the slave treats it. You need to read the slave´s datasheet.(Capitals not meant as shouting but to emphasize)THEN ask a question REFERRING to the slaves communication specification.
*****
Something about 16 bit format. Like writing 1 byte but it sends 2 bytes or just changing the pack size etc.
So it is used, and wanted to know what if ...
If a customer wants 8 eggs, give him a single box with 8 eggs (SPI: 8 bits = 1x 8 bits = 1 byte, 8 SCK cycles)
If a customer wants 16 eggs, give him two boxes with 8 eggs (SPI: 16 bits = 2x 8 bits = 2 byte, 16 SCK cycles)
If a customer wants 24 eggs, give him three boxes with 8 eggs (SPI: 24 bits = 3x 8 bits = 3 byte, 24 SCK cycles)

I don´t know what´s the problem

Are you sure we still are talking about SPI?
* SPI are a couple of signals: SS, MOSI, MISO, SCK
* sending 2 x 8 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
* sending 1 x 16 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
For the SPI there is no difference whether you (STM32 internally) transfer 2x 8 bits or 1 x 16 bits. The slave will never know.
BUT: you have to follow the sequence described in the slave´s datasheet. Read it, read it, read it. Refer to it.


Klaus
 
If a customer wants 8 eggs, give him a single box with 8 eggs (SPI: 8 bits = 1x 8 bits = 1 byte, 8 SCK cycles)
If a customer wants 16 eggs, give him two boxes with 8 eggs (SPI: 16 bits = 2x 8 bits = 2 byte, 16 SCK cycles)
If a customer wants 24 eggs, give him three boxes with 8 eggs (SPI: 24 bits = 3x 8 bits = 3 byte, 24 SCK cycles)

I don´t know what´s the problem

Are you sure we still are talking about SPI?
* SPI are a couple of signals: SS, MOSI, MISO, SCK
* sending 2 x 8 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
* sending 1 x 16 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
For the SPI there is no difference whether you (STM32 internally) transfer 2x 8 bits or 1 x 16 bits. The slave will never know.
BUT: you have to follow the sequence described in the slave´s datasheet. Read it, read it, read it. Refer to it.

Aha, so as far as I understood
If the master sends 1x 16 bits and slave sends 1x8bits then there might be a problem. If master sends 1x16 and slave as well 1x16 bits then it is all fine.
And again, it´s the same as with the eggs. If you have standard 8 bit boxes you can serve every customer that wants 8, 16, 24, 23 eggs.
But you have a problem if you change to 16 egg boxes and a customer asks for 8 or 24 eggs.

Ok so it only confirms that the 16 bit format and the example of receving 8 bits/1byte or 24 bits/3 bytes for this format might be a problem.
It leads to problem that slave sends 8 bits and master sends 16 bits (because master was a 16 bit format).
Are you sure we still are talking about SPI?
* SPI are a couple of signals: SS, MOSI, MISO, SCK
* sending 2 x 8 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
* sending 1 x 16 bits over SPI results in:
--> 16 SCK cycles, 16 bits transferred on MOSI, 16 bits transferred on MISO
For the SPI there is no difference whether you (STM32 internally) transfer 2x 8 bits or 1 x 16 bits. The slave will never know.
BUT: you have to follow the sequence described in the slave´s datasheet. Read it, read it, read it. Refer to it.
So it all leads to the slave, whether the slave is compatible with master or not.
If slave is 8 bit format and master is 16 bit format there will be a conflict. If they are the same format there is no problem because there will not be a problem of like sending 3 bytes/24 bits in 16 bit format instead it is somehow handled (like sending an additional dummy byte or something).

I´ve already told you. Now repeated:It´s not a question of correct thinking, it´s a question on how the slave treats it. You need to read the slave´s datasheet.(Capitals not meant as shouting but to emphasize)THEN ask a question REFERRING to the slaves communication specification.

Ok, Master is 8 bit format and slave is 8 bit format.
I just wondered how it is handled when master has 16 bit register ... So I gave my example there.
 
Hi,
Aha, so as far as I understood
If the master sends 1x 16 bits and slave sends 1x8bits then there might be a problem. If master sends 1x16 and slave as well 1x16 bits then it is all fine.
No, not understood. Read post

When the master sends 16 bits via MOSI ... there will also be 16 bits via MISO.
There is no 16 bit in one direction and a different number (like 8 bit) in the other direction.
Again, again, again... read the slave´s datasheet about the meaning of the bits. No one can tell without reading the datasheet of the slave.

So it all leads to the slave, whether the slave is compatible with master or not.
No. If you - in the meaning of the microcontroller program - is keeping on SPI standards then EVERY SPI slave will be compatible.
If you don´t comply with SPI standard, some slaves may be fine with it, some will not.

****
It seems you want to play a game.
Not reading the documents. Not keeping on standards, not giving meaningful examples by referring to datasheets.

Don´t get me wrong, we don´t get a step forward. And I´m not patient enough.
So I leave it to others to answer your questions.

Klaus
 
But you have a problem if you change to 16 egg boxes and a customer asks for 8 or 24 eggs.
And slave only wants 8 bits that's how I understood it was a problem.
Again, again, again... read the slave´s datasheet about the meaning of the bits. No one can tell without reading the datasheet of the slave.

Which datasheet ?
I thought this is mroe general thing to understand about SPI. When I've encountered the 16 bit registers for SPI that sends usually 8 bits I got confused why it need that 16 bit registers and not 8 bits like in simple examples I've seen :

1699467576569.png


1699467790202.png


So I wondered how it worked with 16 bit registers.
When data is 8 bits.
It seems you want to play a game.
Not reading the documents. Not keeping on standards, not giving meaningful examples by referring to datasheets.

No I am not playing any game if it looks like.
What I am trying to do is
- read the post
- try to say it with my own words to see if I understood
- wait for the reply in hope I've understood

I've usually sent what you've required which were datasheets, examples where I took it from etc.
Tried to come up with an idea how it works and why it works this way the SPI. I only understand the 8 bit data and 8 bit registes. I don't get the 16 bit registers and 16 bit data and 16 bit registers and 8 bit data.

So far as I understood from this part :
I´m fine you optimize to 16 bit packets when ALL of your slaves can work with 16 bit packets or multiples.

But you asked how to handle 8 bit access.
And again, it´s the same as with the eggs. If you have standard 8 bit boxes you can serve every customer that wants 8, 16, 24, 23 eggs.
But you have a problem if you change to 16 egg boxes and a customer asks for 8 or 24 eggs.

Is that slave must be compatible with working in 16 bit boxes.
Ok so it is a problem if we have 16 egg boxes and a customer asks for 8 eggs only Which in other words translater : if we have 16 bit format and the slave asks only for 8 bits it cannot work because the master works on 16 bit format.
On the other side what is master asks for 8 bits (wouldn't make sense because master is 16 bit format so it must send 16 bits so it also must receive 16 bits and not only 8 bits) ? The thing is do you understand what I try to say ? I can try to make a picture if my words are to weird.

For 8 bit format master it would work somehow.

Don´t get me wrong, we don´t get a step forward. And I´m not patient enough.
So I leave it to others to answer your questions.
Understandable, although I have a feeling no one will answear to my weird questions.

Although thank you very much for the help. As I said I might be to bucket headed for that.
Also I might sometimes not understand your answears because I have a feeling these weren't the asnwear to my questions sometimes or I didn't understand what you've tried to tell me. Sorry for repeating myself and for you to repeat yourself, tried my best here.

Like I said I feel now a bit lost and I don't know what I understand and what not. Sorry for complicating simple stuff.
--- Updated ---

Okey I'll try to say anything then what I believe I understand then.

- Usually master is 8 bit format and slave can also be 8 bit format
So in other words Master sends 8 bits and Slave also sends 8 bits.

- If I have 16 bit registers then it depends on the protocol what it does with 8 bit format. I can only speculate like first 8 bits of the registers are for transmit only and another 8 bits only for receive for 8 bit format Master. Only speculations I don't have any datasheet (don't know if there is any mention how big are the registers but ok).

- 16 bit format sends 16 bits and receives 16 bits. Problem can occure if Slave wants only 8 bits because the format is 16 bits so it must sends 16 bits and receive 16 bits so it requires from slave also 16 bits.


This is how I would look at registers that are bigger than 8 bits in SPI (not format but size of registers) in second point.
If it's somehow okey then I can end it here ... I know I have to read the Slave datasheet. I thought maybe the Master also matters when it comes to what size the registers are and how the data is stored there when SPI format is 8 bit and 16 bit.


Thanks for everything.
 
Last edited by a moderator:
Hello!

Just a few comments, probably to say the same as above with other words (sorry, I don't
have time to read the whole thread). So back to 1st message.

If I want to transmit 1 byte and receive 2 bytes then in total the whole transaction is
3 byte. So what happens with 4-th byte ?

Which 4th byte?
This doesn't make sense. It's like saying: I want to ship a 10 kg package and receive
a 20 kg package by mail. What happen to the next 10 kg? Or I want to send a 1MB image
file and my friend will send me a 2 MB file. What happens to the 4th MB?
If the transaction is finished, then you don't have to send any byte. There is no 4th
byte.

Because the full transaction between Master and Slave for 16 bit register must be
minimally 16 bits and not 8 bits like in the picture.

I think I understand what you misunderstood.
You misinterpret the image. It shows the logical data exchange, not the physical exchange.
And beside this, if you shift 16 times as you apparently think, then the master data
would go to the slave (8 times shift) and then come back to the master. Like the rotary
table of a Chinese restaurant if you do a full turn.
Here is an illustration which is closer to happens in the hardware.
On each side, you have 2 registers. One to send and one to receive.

After 8 clock, master send register will be fully transmitted into slave receive register
and slave send register will be fully transmitted into master receive register.

SPI.png


Usually it's represented as it were a loop but it's not.

Other issue: STM32 indeed allows to setup a SPI engine with differnt bit value. I don't understand for what reason they did that, but they did. A very good way to be incompatible with everything else.
Here is a screenshot of CubeMX. You can configure any data width between 4 and 16. On the right, you
can see partly a drop down menu, 4, 5,6, ... 11 bits, but it goes up to 16.
STM32SPI.png


Dora
 
Last edited:

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top