AMSA84
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How much difference in propagation delay and rise tiime do you expect? I wonder if it's significant in relation to process variations?Having the clock input at the top PMOS would increase the delay to the output.
So it is better to have the control signal on top since it would be switching less.
Having the clock input at the top PMOS would increase the delay to the output.
So it is better to have the control signal on top since it would be switching less.
How much difference in propagation delay and rise tiime do you expect? I wonder if it's significant in relation to process variations?