Which language is better and more used Verilog or VHDL?

[Junaid Alam]

verilog versus vhdl

I want to Ask that which is a better language and which is used more in industry!

 

[jimjim2k]

Re: verilog versus vhdl

Hi

1. Search this forum for your subject
2. About 60% of engineers in US use verilog


tnx

 

[ashishjindal76]

Re: verilog versus vhdl

hey
this question has been raised in this forum many many times. i feel that the hdl whth which u feel comfortable is the best. industry accepts both of these hdls it is just the matter of fact that to which place u belong to. verilog was developed in us n hence it is mostly used in us in contrast with vhdl it is europe. verilog is more or less C type while vhdl resembles to ada.

bye
ashish

 

[pisoiu]

Re: verilog versus vhdl

This topic was posted so many times, and I find it really hard to believe that there are relevant news to be said about it. Instead of starting the same old debate again, do a search. Topic locked.

/pisoiu