Feb 4, 2013 #1 M meera Newbie level 1 Joined Feb 4, 2013 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,287 hello.. which language is best one for CPLD coding ? VHDL OR Verilog
Feb 4, 2013 #2 joelby Full Member level 4 Joined Jun 6, 2011 Messages 196 Helped 66 Reputation 130 Reaction score 64 Trophy points 1,308 Activity points 2,644 They're both pretty equivalent. Use whatever your company or your university uses. If you can choose, try both and see which one you like more. By all means learn both. Neither is the "best".
They're both pretty equivalent. Use whatever your company or your university uses. If you can choose, try both and see which one you like more. By all means learn both. Neither is the "best".
Feb 5, 2013 #3 B BlackHelicopter Full Member level 2 Joined Jun 3, 2010 Messages 137 Helped 13 Reputation 26 Reaction score 16 Trophy points 1,298 Activity points 2,207 Either one will describe digital logic just fine. Find one you like, or use whichever is the 'industry standard' in your area.
Either one will describe digital logic just fine. Find one you like, or use whichever is the 'industry standard' in your area.
Feb 5, 2013 #4 T TrickyDicky Advanced Member level 7 Joined Jun 7, 2010 Messages 7,110 Helped 2,081 Reputation 4,181 Reaction score 2,047 Trophy points 1,393 Activity points 39,769 Just please dont use schematic entry or AHDL.