Hi everyone,
I need to design high speed pulse waveform generator. Minimum pulse width must be lower than 300ps and rise-fall time must be lower than 100ps. Delay resolution must be lower than 100ps between channels.
What is the best way to do it. I worked on high speed DACs with JESD204B interface in the past. But I am not sure if it is the correct way to generate pulses.
Can you tell me what kind of ICs is the best choice for this purpose?
A picosecond pulse generator based on a pair of step recovery diodes (SRD), leveraging the transient response of the SRD PN junction and controlling the pulse width by a resistor, is proposed. We first explain the oper…
This paper presents a high-performance low-ringing ultra-wideband monocycle picosecond pulse generator, formed using a step recovery diode (SRD), simulated in ADS software and generated through experimentation. The pulse generator comprises three parts, ...
A picosecond pulse generator based on a pair of step recovery diodes (SRD), leveraging the transient response of the SRD PN junction and controlling the pulse width by a resistor, is proposed. We first explain the oper…
This paper presents a high-performance low-ringing ultra-wideband monocycle picosecond pulse generator, formed using a step recovery diode (SRD), simulated in ADS software and generated through experimentation. The pulse generator comprises three parts, ...
Hi Dana, thank you very much for your answer. Delays between channels, and amplitude of signals must be changeable, so that's why I am actually looking for an IC. Probably pure analog solution will be very hard.
Hi Klaus,
Most probably I will design an amplifier stage for voltage and current requirements. At this stage, I just need to find the correct way, so I can deep dive into the design.
If I use something like a high speed DAC, the controller will be an FPGA.
If I there is some kind of specialized IC so it can generate signals according to the it's registers for example, I can use a simple microcontroller.
There will be 3 channels.
Programmable parameters are amplitude, frequency, pulse width and delay between channels(100ps resolution)
I don't know If I can solve the problem with only FPGA using it's gigabit pins.