24.2 On-Chip Voltage Regulator
All of the PIC24FJ64GA004 family of devices power
their core digital logic at a nominal 2.5V. This may
create an issue for designs that are required to operate
at a higher typical voltage, such as 3.3V. To simplify
system design, all devices in the PIC24FJ64GA004
family incorporate an on-chip regulator that allows the
device to run its core logic from VDD.
The regulator is controlled by the DISVREG pin. Tying
VSS to the pin enables the regulator, which in turn, provides
power to the core from the other VDD pins. When
the regulator is enabled, a low-ESR capacitor (such as
ceramic) must be connected to the VDDCORE/VCAP pin
(Figure 24-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capacitor
is provided in Section 27.1 “DC Characteristics”.
If DISVREG is tied to VDD, the regulator is disabled. In
this case, separate power for the core logic at a nominal
2.5V must be supplied to the device on the
VDDCORE/VCAP pin to run the I/O pins at higher voltage
levels, typically 3.3V. Alternatively, the VDDCORE/VCAP
and VDD pins can be tied together to operate at a lower
nominal voltage. Refer to Figure 24-1 for possible
configurations.
24.2.1 VOLTAGE REGULATOR TRACKING MODE AND LOW-VOLTAGE DETECTION
When it is enabled, the on-chip regulator provides a
constant voltage of 2.5V nominal to the digital core
logic.
The regulator can provide this level from a VDD of about
2.5V, all the way up to the device’s VDDMAX. It does not
have the capability to boost VDD levels below 2.5V. In
order to prevent “brown out” conditions when the voltage
drops too low for the regulator, the regulator enters
Tracking mode. In Tracking mode, the regulator output
follows VDD, with a typical voltage drop of 100 mV.
When the device enters Tracking mode, it is no longer
possible to operate at full speed. To provide information
about when the device enters Tracking mode, the
on-chip regulator includes a simple, Low-Voltage
Detect circuit. When VDD drops below full-speed operating
voltage, the circuit sets the Low-Voltage Detect
Interrupt Flag, LVDIF (IFS4<8>). This can be used to
generate an interrupt and put the application into a
low-power operational mode, or trigger an orderly
shutdown.
Low-Voltage Detection is only available when the
regulator is enabled.