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# Where should we place the capacitor and what's the return noise frequency?

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#### chuan556

##### Member level 2
normally we place the capacitor between the power and ground plane in order to reduce the noise but

1)should we place the cap near the via or at the corner (for a square pcb)?

2)what is the frequency of the return noise?is it same with the source frequency?or how we calculate it?throungh simulation?

i hope someone will help me,thanks.

rgds
chuan556

question:capacitor

Capacitors should be placed as close as possible to the power connections of noisy devices and devices that are susceptable to supply variations.

The frequency of the noise in your circuit entirely depends on what your circuit is doing.

Re: question:capacitor

chuan556 said:
normally we place the capacitor between the power and ground plane in order to reduce the noise but

1)should we place the cap near the via or at the corner (for a square pcb)?

2)what is the frequency of the return noise?is it same with the source frequency?or how we calculate it?throungh simulation?

i hope someone will help me,thanks.

rgds
chuan556

I don't have an answer for you but would like to understand how to calculate the optimal size for bypass capacitors. I think it's basically a low pass filter but don't understand how to determine the impedence of the power rail. I use 100nF close to the power and ground pins but would like to do better than just guessing.

Re: question:capacitor

throwaway18 said:
Capacitors should be placed as close as possible to the power connections of noisy devices and devices that are susceptable to supply variations.

The frequency of the noise in your circuit entirly depends on what your circuit is doing.

my circuit is 4 layer pcb with power and ground in between,so how is the frequency?From the simulation i found that the frequency of the gap cover the whole range so i cant pick a single frequency to represent the gap in order to put into my equation.

i also know that we need to put as near as possible from the simulation but how you define the range?

another question is can i use pspice to run this simulation?

question:capacitor

I [..] would like to understand how to calculate the optimal size for bypass capacitors.

This are lots of aspects to this.
You have to consider the characteristics of real capacitors. From Zc=1/sqrt(2.pi.F.C) you might think
that a 470uF cap would be really low impedance and ideal for your circuit. The impedance of typical 470uF electrolytics increases with frequency at a couple of MHz and up.

I use 100nF close to the power and ground pins but would like to do better than just guessing.

You can take the emprical approach of putting an oscilloscope on the supply and seeing how much it varys when your device is operating.

my circuit is 4 layer pcb with power and ground in between,so how is the frequency?

The number of layers of the pcb has no effect on the operating frequency of the circuit.
The frequency distribution of the noise on your power supply will be totally different between for
example an analog audio device and a pentium PC. If you are making a digital device thats operates
in sysnc with a clock oscillator then the clock frequency and it's harmonic multiples will usually be
significant. Depending on what your device does the noise frequencys on the supply may be set by
external signals connected to your device.

question:capacitor

if we want to see the responce of the far end is that mean we need to measure the receiver?

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