where is the synthesis option -io_buf available in VIVADO ?

Status
Not open for further replies.

hcu

Advanced Member level 4
Joined
Feb 28, 2017
Messages
101
Helped
0
Reputation
0
Reaction score
0
Trophy points
16
Activity points
874
i found out that , i have to uncheck "-io_buf" option (in synthesis settings) in ISE tool to successfully generate bitfile , otherwise it may endup with the "placer" error, like place 30-69 and place 30-378 .This is true for my design .

I want to more about this error and secondly important thing, what and where is the same setting available in vivado. i not found this -io_buf option anywhere.
 

Somewhere in your RTL are the peripheral signals tri-stated?
Go to your RTL. The io_buf might be inferred or it might be directly instantiated. You may remove it (if that makes sense and no further errors).

I use Vivado and 7series Xilinx. For me the primitive in RTL is IOBUF.
 

This sometimes comes up when you have b-box ip cores that also create IO bufs. there is an IO_BUFFER_TYPE attribute that you can apply to top level ports to avoid instantiation. This might be what you want to do vs -io_buf.

IIRC, you can also specify something like -io_buf in additionally synthesis options, and newer versions of the tools have a checkbox for this. I only use -io_buf for sandbox designs.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…