where is HDL SubSystem in DSP builder

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alienx

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Hi,

I am new to DSP builder and FPGA programming. I was following DSP builder example which was on implementing FIR filter using DSP builder in Simulink and generating VHDL to be implement in my cyclone 2 FPGA. I came across this block as was given in the example steps which was "HDL SubSystem block" but I can't seem to find this block in my DSP builder library... could someone tell me what is wrong... I even tried reinstalling DSP builder..

here is the tutorial that I have been using to design me FIR filter using simulink.... its on page 39 step 10 from adobe file....its on the 2nd section Implementing DSP design using FPGA....
here is the link [ScanDoc] (3).pdf - 4shared.com - partage de documents - télécharger
 

any one....??
 

Here is something that may help you:

Source : **broken link removed**
 

@farhada

there is no HDL subsystem block in DSP builder 9.0 library, I tried everything its not there,,,
 

@farhada

there is no HDL subsystem block in DSP builder 9.0 library, I tried everything its not there,,,

I am sorry, but I no longer have the DSP Builder, but you may send this question to Altera's help desk. I am sure they will be able to help you easily.
 

Thanks for trying farhada hopefully someone else might have the solution.... Could someone sent me the VHDL code for adaptive filter or point me to a Simulink model of an adaptive filter.....
 

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