Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What's the normal permittivity and conductivity of P-substrate of CMOS technology?

Status
Not open for further replies.

Beardolphinaries

Member level 2
Joined
Aug 21, 2007
Messages
46
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,288
Activity points
1,583
Hi,
What's the normal permittivity and conductivity of P-substrate of standard CMOS technology, such as 130nm?
Thanks a lot.
 

Re: P-substrate

Beardolphinaries said:
Hi,
What's the normal permittivity and conductivity of P-substrate of standard CMOS technology, such as 130nm?
Thanks a lot.

Why do you care them?
 

Re: P-substrate

because I need to simulate an on chip inductor on lossy silicon substrate.
 

Re: P-substrate

Beardolphinaries said:
because I need to simulate an on chip inductor on lossy silicon substrate.

Usually, the foundry has designed the model of on chip inductor.

I use the on chip inductor frequently, but never do as you said.

So I sorry I can't help you.
 

Re: P-substrate

it depends on the substrate u wrkin on whether lightly doped or heavily doped substrate.
 

Re: P-substrate

it's a kind of company secret.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top