Whats the difference between SET_FALSE_PATH and SET_IDEAL_ne

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set_ideal_network

Which constraint should i set on a port/pin/wire which has a very large fanout?
SET_FALSE_PATH or SET_IDEAL_NETWORK?

What is the difference between SET_FALSE_PATH and SET_IDEAL_NETWORK.?

And, what about another command "set_disable_timing"?

thanks!
 

set_false_path

For large fanout nets, use set_ideal_network. This should be done during synthesis, before running clock tree sythesis. During CTS you also need to buffer your high fanout nets.

set_false_path on a pin/port/net is used when you don't care about timing through that path.

set_disable_timing is used for disabling timing arcs through cells which are not real or you don't care about.
 

set_disable_timing set_false_path

Regarding shelby's reply, you should set your HFN to be ideal before synthesis, but it doesn't matter for cts because cts will only build a buffer tree for what is defined as a clock.
 

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