gtib007
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Hello there am using Virtuoso to draw a schematic and a layout of a certain expression and i want to know the best way to do it so i can optimise the speed of the transmission from each state.
the expression is OUTPUT = X + ( Y . (Z'))
shall i use de morgan theorem ? i will need two inverters if i do use de morgan theorem
and if i didnt i would still need 2 inverters, one to invert z and one to invert the final output value.
barring in mind i need to optimise the speed of the layout. so what do u suggest for the N and P MOS width sizing ?
Many thanks in advance !
the expression is OUTPUT = X + ( Y . (Z'))
shall i use de morgan theorem ? i will need two inverters if i do use de morgan theorem
and if i didnt i would still need 2 inverters, one to invert z and one to invert the final output value.
barring in mind i need to optimise the speed of the layout. so what do u suggest for the N and P MOS width sizing ?
Many thanks in advance !