Re: About POR design
1. delay cell is simply composed of 2 inverters and one MOS cap between them, one of the two inverter is weak type, and the other is medium type. u had to simulate it against VCC, tempearture, corner to find a optimum W/L v.s. delay time.
2. in talking about the above , I assume that u had already a POR signal , and all u want to do is delay it until the VCC is ready. but from ur description, it seem that u will compare the POR with some reference ?
3. if possible, post ur schematic or idea.