What techniques to use.....for linear PA at 12Ghz???

[AlexUA]

Hello! Who can help?please
I need this information.


How to reduce intermodulation distortion of linear PA (12Ghz operating frequency, power of out = 1000mW at 1dB compressino point) ?? What techniques can be done to improve IP3?

If possible point out the refference to internet source dealing with this question.

Thank you in advance.

 

[VSWR]

You have to describe your design: transistor used, existing performance (P1dB = 30 dBm?), wanted performance, circuit diagram. Archive our design files with WinRAR and post here so we can take a look.

 

[AlexUA]

VSWR.
I use such FET transistor - MGF2425A. Data sheet in attachment file. I'm designing for MAX gain usins S-parameters by standart techiques.
Amplifier operate at class A. I would like to enchance IIP3 at fix output power. Is it possible?

 

[VSWR]

You may use a balanced amplifier configuration with two 90° hybrid couplers. This is a practical method for obtaining a broadband amplifier with output power equal to twice that of a single amplifier. The output 3rd order intercept performance is also improved by 3 dB. Some other advantages of a balanced amplifier:

- redundancy - if one of the amplifier stages fails, the balanced amplifier will still operate with reduced gain and linearity.

- input and output VSWR dependent on the coupler. Individual amplifiers can be matched for specific parameters - IP3, P1dB, etc.

- easily cascaded - each unit is isolated by the coupler.

- high degree of stability.

 

[vfone]

The maximum IIP3 limit of a single MGF2445 (when is well matched for best linearity) is approximately +36dBm.
In general if the gain of the amplifier is high there could be done a compromise reducing the gain and improves the IIP3 point.
In your case is hard to do this because the gain of the transistor is already low. The only solution remains a push-pull with the cost that appear from this topology.