Re: ESD protection
You can use the following solutions, depending on circuit speed:
1. A Zener diode, typically in parallel to a decoupling capacitor, across the ESD-sensitive terminal, such as CMOS I/O pin. However this is only suitable for low to medium speed interfaces in the range below 100MHz.
2. A dual-rail clamp which is frequently used in high speed interfaces above 100MHz to a few GHz. Two diodes in reversed-bias are used. A diode between the rail voltage (V+) and the I/O pin that clamps the +ESD (greater than V+) from the I/O pin to the rail. Another diode between the ground (V-) and the I/O pin that clamps the -ESD (lower than V-) to ground.