The best analog simulator is the one which you forget about his name. The future in analog design is a complete encapsulation of the
(netlist, comand)->result
engine into in enviroment which concentrate on the main analog design tasks. The cadence ADE is a small step in this direction. It need much more progress to to run corner, sensitivity, mismatch, hiearchical embedding, modelling, background verification and all task of >100k device analog projects in more automated and productive enviroment. The past research effort in analog design automation concentrate on synthesizers for a limited class of common used IPs. I did not see any approach, beside one cadence tool, to ask the question from the tools side what is the spec of the project/subproject/circuit. If a specification driven analog design enviroment is used many tasks could be automated because the circuit targets are formulated to be automatic verified by the machine. Also a limited insight into circuit topology could be supported today. For example the automatic identification of matching groups and the the automatic analysis of the mismatch impact could be done. Further possible tools are automatic dimensioning with abstract targets like maximum DC current, VDSAT, branch current distribution optimisation, floating node identification for power down.
There is so much lacking that the question which simulator is better target only a very minor area of improvement for the analog designer.