What should I consider for Spartan3 FPGA internal power?

[davyzhu]

FPGA Power

Hello all,

I use Spartan3 400k gates FPGA for a design, the NSC datasheet said that the Iint(internal)_1.2V for this chip is 0.2 to 3(max), but Xilinx datasheet said nothing about the internal current.

And I found a ref design provided by Xilinx use a 1A regulator, shall I choose the same one, and what shall I consider for FPGA internal power first? The 3A LDO regulator is too expensive, and I am not familiar with the switch regulator.

Regards,

Davy Zhu

 

[whitenoise]

Re: FPGA Power

Have you tried to estimate the power consumption of your project?
You can use the power estimator on the Xilinx web-site at:

h**p://www.xilinx.com/cgi-bin/power_tool/power_Spartan3

bye wn.

 

[ashishjindal76]

FPGA Power

hi

for what purpose u need to consider the current. i think that the designs are mostly based on the flow of voltage signals. the power consumption is very very less in fpga. also that the fpga is used for the purpose of processors or controllers. with processor i mean that u customise the device that which process it should be executed. so there is no need to consider the current. more the input signals, higher the frequency, more the power it consumes.

ashish

 

[Aser]

Re: FPGA Power

One problem is with the FPGA configuration process.
Xilinx affords to provide its FPGA with a current cource
up to 3-5 A during configuration to support the high power consumption during this process.
After that the current can go down in tenths times.
Therefore one solution is the current source, say 0.5A, and a powerful capacitor which provides 3 A during configuration.

 

[davyzhu]

FPGA Power

Hi, I try the the power estimator on the Xilinx web-site, because I don't know how many LUT it will use, the result is just the IDLE mode current and power.

BTW,the FPGA is for DSP like a MP3 Codec, I only have the C code, can I translate it to SystemC and estimate the LUT?

 

[leonyang]

FPGA Power

If you want to get the clear breakdown of power consumption of your design, you can use the power estimation tool that provides by Xilinx ISE, called XPower.

 

[leonyang]

FPGA Power

As what I know, there are not commercial behavior level power estimation tools now! So your design described by C code cannot be used for power estimation. You must implement your design in netlist fashion first.