manasiw2
Member level 1
Hi all,
i have two questions,
1.I read in xilinx paper, moore machines are more suitable for fpgas than cplds, why? is it specifically for xilinx fpga architecture?
2.When i implemented structural code for xilinx cpld, fitting errors occured.
same code when implemented using behavioral it fitted properly. why so?
i know it is due to XST but which property of synthesis tool causes this difference?
thanks in advance.
i have two questions,
1.I read in xilinx paper, moore machines are more suitable for fpgas than cplds, why? is it specifically for xilinx fpga architecture?
2.When i implemented structural code for xilinx cpld, fitting errors occured.
same code when implemented using behavioral it fitted properly. why so?
i know it is due to XST but which property of synthesis tool causes this difference?
thanks in advance.