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What limits how many transistors there can be in a current mirror

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matrixofdynamism

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Current mirrors can be made using BJT or FET transistors. In this structure a single transistor forces Vbe on other transistors such as to force a certain current through them which equals the current flowing through the first transistor, as per the diode equation.

What limits how many transistors can be put together in a current mirror i.e how many copies of current can we get at most from a single transistor?
 

This depends on a few things.

For bipolar mirrors, you'd need base current buffering
to keep any decent fidelity (figure each dependent
"steals" 1-2% of pilot current, as does the primary).
Then buffering puts you down to sub-%-per-stage.
Beyond that you probably need more gain and replica
feedback to get better than 10-bit matching.

For CMOS the issue is not DC but AC - the Cdg of all
the rack can make dynamic operation soggy, at best.
You might burn some power and add a dummy shunt
MOSFET to bring Zbias down, etc. Splitting mirrors
can move poles out (say, drive 4 N mirrors from 2
P mirrors, rather than 1:8, cuts Cdg in half) to some
degree.

There are topologies that do better than simple. But
everything has its price (power and/or area and/or
bandwidth, generally).
 
Additionally for MOS current mirrors there's a limit depending on how much accuracy you need - inaccuracy depends on transistor size, their local distribution and local mismatch error. Identical layouts assumed, of course.
 
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