Equal-sized CMOS switch may give a low charge injection
at a particular point in the common mode range but as you
depart from the balance-point you will see charge injection
increase. A small a switch as can meet the acquisition /
sample-mode settling time, is best for charge injection.
A lower-overdrive switch gate drive circuit can also help,
but now you need some extra circuitry to make a "local rail
pair" with "just enough headroom" for wherever the input
is sitting. That would then limit ability to track high frequency
inputs (which may or may not be a valid application case).
Last time I designed a S/H piece-part, I was on a JFET
technology and had to make a low-gate-swing drive, plus
add a compensating device counter-switching to minimize
the sampling pedestal. That's all hand-tune-y type work, to
be repeated once you get an extracted layout.