if u have a latch in your design and you are not using one full clock cycle for the latch... you could use the unused clock period for next or previous combinationl logic.. this idea is called time borrowing
borrow time from neighborhood stage
for example, the delay between two fllip-flops may be too long, but the delay between next two flip-flops is very short, so time can be borrowed from the next stage
timing borrow, we refer to use latch to borrow time, which is typically half a cycle.
retiming, is to move register forward or backward through the combinatorial logic to balance the timing paths on every stage in the nearby register chain.
timing borrow, we refer to use latch to borrow time, which is typically half a cycle.
retiming, is to move register forward or backward through the combinatorial logic to balance the timing paths on every stage in the nearby register chain.
Generally, 'timing borrowing' is to use latch's behavior to make slack of previous stage or next stage met according on max. borrowing or balanced borrowing.
Other STA tool also provide 'pass-through' mode for timing analysis in latch designs, such as Incentia's TimeCraft.