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What is TIG and what is it used for ?

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shsshs

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in my project , I am using different clock domains . (50 , 88 , 100 MHz) during the implementation , at router step I have had error related to timing constraints. I didnt understand why.. Then after my internet search , I found something TIG. But I didnt understand explicitly what does it means.... can anyone make me well_informed about TIG and use of it?
 

timing constraints

TIG is "timing ignore". there are times when the tools find a timing constraint that is invalid.

for example, if there are two clocks that are related, say 100MHz and 200MHz, that were generated from the same PLL, then the tools might impose a 5ns constraint on all signals that pass between the clock domains.

But, async fifos might be used in the design. Such fifos will work between arbitrary clock domains. As such, the 5ns constraint isn't needed. TIG can also be used when the actual value of the logic isn't required to be 100% accurate at all times -- perhaps the logic is lighting a LED. TIG can sometimes be used on reset lines, though not always.
 

Re: timing constraints

again I want to ask something.. for example I have input named " data " . If I can apply time constraints to data , is there any possibility that my data can not affect my output? what I mean is that does the wrong working part(s) continue ?
 

timing constraints

Most likely "Data" needs to be analyzed for timing. TIG is used to tell the tools that something is a special case, and does not need to be analyzed.
 

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