What is their definition???

[liuyying]

What is the definition of:-
1. High Level Input Voltage
2. Low Level Input Voltage
3. High Level Output Voltage CMOS Loads
4. High Level Output Voltage TTL Loads
5. Low Level Output Voltage CMOS Loads
6. Low Level Output Voltage TTL Loads
7. Input Leakage Current
8. Quiescent Device Current???

 

[IanP]

See: Logic signal voltage levels : LOGIC GATES

:wink:
IanP

 

[ckshivaram]

1. High Level Input Voltage
this is the minimum voltage level required at an input for a logic 1.... if the input voltage falls below this point, it will not be considered a logic 1.
2. Low Level Input Voltage
this is the maximum voltage level required at an input for a logic 0.... if the input voltage rises above this point, it will not be considered a logic 0.

4. High Level Output Voltage TTL Loads
this is the minimum voltage level for a logic 1, at the output of the gate under load.
6. Low Level Output Voltage TTL Loads
this is the minimum voltage level for a logic 0, at the output of the gate under load.

 

[liuyying]

Then what is the difference between High Level Output Voltage TTL Loads and High Level Output Voltage CMOS Loads?????