What is the relationship between small current and yield?

[Owen Hao]

small current vs. yield

Hi,good night everybody.
We know, for IC design, yield is the most important item we concern,and yield depends on many factors, such as process, the robust of circuit design, package and so on. Now I am going to know the relationship between current vs. yield. Say,
if the MOSFET in one analog IC operate under 100nA, and the MOSFET in another one operates under 1uA, (suppose all devices in these two devices are in active region), which one is inclined to get higher yield? And is there a kind of industrial standard to describe the lowest current allowed in a single MOSFET in order to get reasonable yield?
I hope what I am worrying about is unnecessary, but I really want to anyone could give me a clear picture about my confusing. Thanks advance! ^_^:|

 

[elbadry]

Re: small current vs. yield

I think at this ultra-small current levels, it is not easy to get your device to work in the active region. They would most probably operate in the "Subthreshold" region of operation...

If this is the case "Subthreshold operation", then I think the yield might be small simply because modeling of this region is not as accurate as that of the active region...

I am not quite sure but that's what i think...

 

[Humungus]

Re: small current vs. yield

Operating in the weak inversion region (this is also active) requires that you must have a fitted continuous model such as EKV or ACM. Do not use BSIM!!!!

Actually, even if this requires extra work from you, it pays when designing very low power circuits. Actually, I designed part of a pacemaker ans I use bias currents as low as 50nA. This is an industrial design and there are people with my device inside. So operation in WI is as realiable as operation in SI, provided that a good modelling has been done prior to any design phase. Just to add a comment, the gm/Id methodology is by far the most suitable technique to design circuits operating in such low current regimes.