What is the purpose of using Memory Models from EDA vendor? What are its advantages ?

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rshrig

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I would like to know why do we have a Memory Models from EDA vendors(Denali , etc). What advantage does it offer compared to a behavioral memory component that can be created using verification languages?
 

How long have you spent verifying, validating and certifying what you're written, actually does what you think it does ?

Vendors are suppose to provide you with that warm fuzzy feeling.
 

rshrig said:
I would like to know why do we have a Memory Models from EDA vendors(Denali , etc). What advantage does it offer compared to a behavioral memory component that can be created using verification languages?
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what? If you are using a 3rd party IP, you DEFINITELY want to use their simulation models. If you create your own it is very easy to misinterpret things. I have used memory models that have 1k+ lines, I ceirtainly wouldn't even try to mimic them with my own code. This goes against all the reuse practices the industry is based on.
 

What advantage does it offer compared to a behavioral memory component that can be created using verification languages?
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Putting it simply - Reduce dev time, cost and errors.
 

The value is in the difference between "can" and "did".
 
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