In VHDL "nothing" ... .. TCL/TK is a scripting language ... It is genrally used to automate your runing of the environment for example ... you can write tcl scripts that can compile all your vhdl codes in modelsim rather than run all your modelsim commands every time you want to simulate . If you wish to use tcl first learn tcl , then you can probably make simple scripts
Hi,
As semiconductorman written Tcl/tk is scripting language, It has nothin to do with VHDL. My views are also same.
I am uploading the document for the Tcl/tk. It will help you
tcl is "tools command language", which change a large work to some small work, so you can use those small work to do something. Now , all eda tools supple tcl, you just need learn some simple tcl , and how to use eda tools.
tcltk is a scripting language and can be used for automating commands and making gui applications and interfacing with eda tools.
More information and the book **broken link removed**
Tcl/tk may be helpful for modelsim and design compiler users. However, I think unix-shell and perl are more helpful for all engineers in programming, design, and verification etc.