what is the most ffs we used in our design, DFFs or JKFFs?

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drizzle

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hello all

now i wonder to design an asyn counter, but i have no idea about which FFs should i choose to constructed the circuit.

in my opinion, DFFs are the unique cases in JKFFs

anybody can give me some advise.

regards
drizzle
 

Re: what is the most ffs we used in our design, DFFs or JKFF

D flop-flop is used in VHDL and Verilog RTL widely.
 

Re: what is the most ffs we used in our design, DFFs or JKFF

uday_das said:
D flop-flop is used in VHDL and Verilog RTL widely.
Click to expand...


why?
can u expand it more?
 

Re: what is the most ffs we used in our design, DFFs or JKFF

When writing RTL code we can use any type of flip-flop that suits the logic being designed. But when it comes to RTL implementation of the code, the synthesis tool only uses D-FFs and variants of D-FFs. This is because D-FFs are universal and we can implement other FFs using D-FFs. Moreover, D-FFs do not have indeterminate states like JK and RS. I also think D-FFs take up lesser silicon area than other FFS and timing is better in case of D-FFs.
 

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    drizzle

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