threekingtiger
Member level 1
What's the influence of complex poles to OP-amp stability?
In "CMOS Analog Circuit Design 2nd Edition" by Phillip Allen, he pointed out that the complex poles may result in poor phase margin in section 7.1, more specifically Figure 7.1-5(a).
Can anyone tell me why the poles p2 and p3 in Figure 7.1-5(a) is bad for PM or recommend some paper which has sheded light on this problem?
In "CMOS Analog Circuit Design 2nd Edition" by Phillip Allen, he pointed out that the complex poles may result in poor phase margin in section 7.1, more specifically Figure 7.1-5(a).
Can anyone tell me why the poles p2 and p3 in Figure 7.1-5(a) is bad for PM or recommend some paper which has sheded light on this problem?