What is the disadvantage of Folding??

[vlsitechnology]

Can anyone tell me what is the disadvantage of Folding in detail?

 

[tshankar501]

higher power; current both in folded branch and also in unfolded branch...

 

[vlsitechnology]

Can u please elaborate? so that i can understand clearly

 

[cooldude040]

Could u please tell me how the power increases? I think power remains same the only thing is delay decreases but i need the disadvantage of Folding......Can anyone tell me

 

[moriar]

When you describe folding... is this circuit folding like in a folded cascode op-amp or folded adc or are you talking about transistor folding?

Erm... well, for transistor folding I think for even gate count folding, you sometimes get diffusion gaps. You can probably claim higher complexity hahaha. I have no idea about the power increase though.

Are you saying that by folding we are increasing leakage or active power consumption?? I cannot imagine this so if you can point to relevant material, that would be great.

Thx.

 

[vlsitechnology]

I am talking in terms of standard cell folding..

 

[wkong_zhu]

I think the disadvantage of folding is the complexity of control. and the critical path enlarged!

 

[tshankar501]

I am sorry, I was thinking it is a folded adc or folded op amp when I said it will result in increase in power. I still argue that folding of standard transistor might result in a slight increase in the delay because of the extra parasitic caps and res associated with the routing between different diffusion gaps. However this delay might be compensated by the reduction in the gate resistance since you are reducing the gate size.

The routing complexity will be another disadvantage.

 

[moriar]

Quote: "I still argue that folding of standard transistor might result in a slight increase in the delay because of the extra parasitic caps and res associated with the routing between different diffusion gaps. However this delay might be compensated by the reduction in the gate resistance since you are reducing the gate size. "

Actually, this depends on how the folding was done and which parasitic cap/res will affect the output switching speed. If additional parasitic cap is added to say the source but output capacitance is reduced due to sharing of drain from folding, then you may find that it actually helps switching speed.

Added after 1 minutes:

By folding, gate size also doesn't change...