Mar 29, 2012 #1 O omar-malek Member level 5 Joined Mar 24, 2007 Messages 89 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Location French Activity points 1,949 What is the diffrenece between timining analysis for FPGA and ASIC so an engineer of digital design choice between timing analysis of fpga and asic . the same for the constraint.? thank you
What is the diffrenece between timining analysis for FPGA and ASIC so an engineer of digital design choice between timing analysis of fpga and asic . the same for the constraint.? thank you
Mar 30, 2012 #2 Y yx.yang Full Member level 4 Joined May 29, 2008 Messages 236 Helped 49 Reputation 98 Reaction score 46 Trophy points 1,308 Location ZhuHai, GuangDong, China Activity points 2,661 First: The constraint concept is the same. Such as you need constraint clock period, identify false path, identify multi-cycle path, define input/output delay. While each tool has different timing constraint syntax.
First: The constraint concept is the same. Such as you need constraint clock period, identify false path, identify multi-cycle path, define input/output delay. While each tool has different timing constraint syntax.